-
1
-
-
0001264767
-
A 14-b 150-Msample/s update rate Q2 random walk CMOS DAC
-
Feb. 15-17
-
J. Vandenbussche, G. Van der Plas, A. Van den Bosch, W. Daems, G. Gielen, M. Steyaert, and W. Sansen, “A 14-b 150-Msample/s update rate Q2 random walk CMOS DAC,” in Proc. IEEE Solid-State Circuits Conf., Feb. 15-17, 1999, pp. 146–147.
-
(1999)
Proc. IEEE Solid-State Circuits Conf.
, pp. 146-147
-
-
Vandenbussche, J.1
Van der Plas, G.2
Van den Bosch, A.3
Daems, W.4
Gielen, G.5
Steyaert, M.6
Sansen, W.7
-
2
-
-
0024754187
-
Matching properties of MOS transistors
-
Oct.
-
J. M. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, “Matching properties of MOS transistors,” IEEE J. Solid-State Circuits, vol. 24, no. 5, pp. 1433–1439, Oct. 1989.
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, Issue.5
, pp. 1433-1439
-
-
Pelgrom, J.M.M.1
Duinmaijer, A.C.J.2
Welbers, A.P.G.3
-
3
-
-
0022891057
-
Characterisation and modeling of mismatch in MOS transistors for precision analog design
-
Dec.
-
K. R. Lakshmikumar, R. A. Hadaway, and M. A. Copeland, “Characterisation and modeling of mismatch in MOS transistors for precision analog design,” IEEE J. Solid-State Circuits, vol. SC-21, no. 6, pp. 1057–1066, Dec. 1986.
-
(1986)
IEEE J. Solid-State Circuits
, vol.SC-21
, Issue.6
, pp. 1057-1066
-
-
Lakshmikumar, K.R.1
Hadaway, R.A.2
Copeland, M.A.3
-
4
-
-
84939758810
-
Comments, with reply, on ‘Characterization and modeling of mismatch in MOS transistors for precision analog design
-
Feb.
-
C. S. G. Conroy, W. A. Lane, M. A. Moran, K. R. Lakshmikumar, M. A. Copeland, and R. A. Hadaway, “Comments, with reply, on ‘Characterization and modeling of mismatch in MOS transistors for precision analog design’,” IEEE J. Solid-State Circuits, vol. 23, no. 1, pp. 294–296, Feb. 1988.
-
(1988)
IEEE J. Solid-State Circuits
, vol.23
, Issue.1
, pp. 294-296
-
-
Conroy, C.S.G.1
Lane, W.A.2
Moran, M.A.3
Lakshmikumar, K.R.4
Copeland, M.A.5
Hadaway, R.A.6
-
5
-
-
0003994354
-
Characterization of MOS transistor mismatch for analog design
-
Ph.D. dissertation, Leuven, Belgium
-
J. Bastos, “Characterization of MOS transistor mismatch for analog design,” Ph.D. dissertation, Electrotech. Dept., Katholieke Universiteit Leuven, Leuven, Belgium.
-
Electrotech. Dept., Katholieke Universiteit Leuven
-
-
Bastos, J.1
-
6
-
-
0033699219
-
An accurate statistical yield model for CMOS current-steering D/A converters
-
May 28-31
-
A. Van den Bosch, M. Steyaert, and W. Sansen, “An accurate statistical yield model for CMOS current-steering D/A converters,” in Proc. IEEE Int. Symp. Circuits Syst., May 28-31, 2000, vol. 4, pp. 105–108.
-
(2000)
Proc. IEEE Int. Symp. Circuits Syst.
, vol.4
, pp. 105-108
-
-
Van den Bosch, A.1
Steyaert, M.2
Sansen, W.3
-
7
-
-
85008007220
-
A binary-to-thermometer Decoder with built-in redundancy for improved DAC yield
-
Kos, Greece
-
G. I. Radulov, P. J. Quinn, P. C. W. van Beek, J. A. Hegt, and A. H. M. van Roermund, “A binary-to-thermometer Decoder with built-in redundancy for improved DAC yield,” in Proc. IEEE Int. Symp. Circuits Syst., Kos, Greece.
-
Proc. IEEE Int. Symp. Circuits Syst.
-
-
Radulov, G.I.1
Quinn, P.J.2
van Beek, P.C.W.3
Hegt, J.A.4
van Roermund, A.H.M.5
-
8
-
-
49749126884
-
Novel digital pre-correction method for mismatch in DACs with built-in self-measurement
-
Limerick, Ireland, Jul.
-
P. Harpe, “Novel digital pre-correction method for mismatch in DACs with built-in self-measurement,” in Proc. IEEE Conf. Advanced A/D and D/A Conversion Techniques and Their Applications, Limerick, Ireland, Jul. 25–27, 2005.
-
(2005)
Proc. IEEE Conf. Advanced A/D and D/A Conversion Techniques and Their Applications
, pp. 25-27
-
-
Harpe, P.1
-
10
-
-
0003407041
-
Convergence of Probability Measures
-
New York: Wiley
-
P. Billingsley, Convergence of Probability Measures. New York: Wiley, pp. 83–85.
-
-
-
Billingsley, P.1
-
11
-
-
33947576470
-
Functionals of Brownian bridges arising in the current mismatch in D/A-converters Eurandom Report 2006-016
-
Jun. [Online]. Available:
-
M. Heydenreich, R. van der Hofstad, and G. Radulov, Functionals of Brownian bridges arising in the current mismatch in D/A-converters Eurandom Report 2006-016, Jun. 2006 [Online]. Available: http://arxiv.org/abs/math.PR/0606584
-
(2006)
-
-
Heydenreich, M.1
van der Hofstad, R.2
Radulov, G.3
-
12
-
-
0036292808
-
Formulation of INL and DNL yield estimation in current-steering D/A converters
-
May
-
Y. Cong and R. L. Geiger, “Formulation of INL and DNL yield estimation in current-steering D/A converters,” in Proc. 2002 IEEE Int. Symp. Circuits and Systems, May 2002, pp. 149–152.
-
(2002)
Proc. 2002 IEEE Int. Symp. Circuits and Systems
, pp. 149-152
-
-
Cong, Y.1
Geiger, R.L.2
-
13
-
-
0038489128
-
DNL and INL yield models for a current-steering D/A converter
-
Bangkok, Thailand, May
-
M. Kosunen, J. Vankka, I. Teikari, and K. Halonen, “DNL and INL yield models for a current-steering D/A converter,” in Proc. 2003 IEEE Int. Symp. Circuits Syst., Bangkok, Thailand, May 2003, pp. 969–972.
-
(2003)
Proc. 2003 IEEE Int. Symp. Circuits Syst.
, pp. 969-972
-
-
Kosunen, M.1
Vankka, J.2
Teikari, I.3
Halonen, K.4
-
15
-
-
20444402580
-
2 die area
-
May
-
2 die area,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 5, pp. 246–250, May 2005.
-
(2005)
IEEE Trans. Circuits Syst. II, Exp. Briefs
, vol.52
, Issue.5
, pp. 246-250
-
-
Greenley, B.1
|