A parameterizable floating-point logarithm operator for FPGAs

Conference Record - Asilomar Conference on Signals, Systems and Computers

Volumn 2005, Issue , 2005, Pages 1186-1190

  Detrey, Jérémie ^a   De Dinechin, Florent ^a  

^a UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; DIGITAL ARITHMETIC; MATHEMATICAL OPERATORS; PROGRAM PROCESSORS;

ELEMENTARY FUNCTION; LOGARITHM OPERATOR; PARALLELISM;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33847653821     PISSN: 10586393     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/acssc.2005.1599948     Document Type: Conference Paper

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