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Volumn 2006, Issue , 2006, Pages

1 Gb stacked solution of multilevel NOR flash memory packaged in a LFBGA 8 mm by 10 mm by 1.4 mm of thickness

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY; ELECTRONICS PACKAGING; MICROELECTRONICS; SIGNAL INTERFERENCE; WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 33847171961     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESIME.2006.1643997     Document Type: Conference Paper
Times cited : (7)

References (12)
  • 9
    • 0035707220 scopus 로고    scopus 로고
    • Simultaneous switching noise analysis and low-bounce buffer design
    • Dec
    • S.-J. Jou, W.-C. Cheng, Y.-T. Lin, "Simultaneous switching noise analysis and low-bounce buffer design", IEE Proc., Circuits, Devices and Systems, Vol. 148, No. 6, Dec. 2001, pp. 303-311
    • (2001) IEE Proc., Circuits, Devices and Systems , vol.148 , Issue.6 , pp. 303-311
    • Jou, S.-J.1    Cheng, W.-C.2    Lin, Y.-T.3
  • 10
    • 5044245072 scopus 로고    scopus 로고
    • Modelling and analysis of ground bounce due to internal gate switching
    • Aug
    • L. Yang, and J. S. Yuan, "Modelling and analysis of ground bounce due to internal gate switching", IEE Proc., Circuits Devices Syst., Vol. 151, No. 4, Aug. 2004, pp. 300-306
    • (2004) IEE Proc., Circuits Devices Syst , vol.151 , Issue.4 , pp. 300-306
    • Yang, L.1    Yuan, J.S.2
  • 12
    • 61549118629 scopus 로고    scopus 로고
    • Fully Testable Double Stacked Logic Plus Flash With Embedded Connections
    • Tampere, Finland
    • G. Vanalli et al, "Fully Testable Double Stacked Logic Plus Flash With Embedded Connections", IMAPS Electronics Packaging 2004 conference, Tampere, Finland
    • IMAPS Electronics Packaging 2004 conference
    • Vanalli, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.