An 80-Mb/s 0.18-μm CMOS analog min-sum iterative decoder for a (32,8,10) LDPC code

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 243-246

  Hemati, Saied ^a   Banihashemi, Amir H ^a   Plett, Calvin ^a  

^a CARLETON UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; ITERATIVE METHODS; MOS DEVICES; SYSTEMS ANALYSIS; TRANSISTORS; TURBO CODES;

CURRENT MODE CIRCUITS; ITERATIVE DECODERS;

CMOS INTEGRATED CIRCUITS;

EID: 33847170601     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568652     Document Type: Conference Paper

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