A very low voltage design for different CMOS low-noise amplifier topologies at 5GHz

Midwest Symposium on Circuits and Systems

Volumn 2005, Issue , 2005, Pages 643-646

  Yanjie, Wang ^a   Khan, M Zamin ^b  

^a UNIVERSITY OF ALBERTA   (Canada)

^b Dept of Electrical and Computer Engineering   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC NETWORK TOPOLOGY; ENERGY DISSIPATION; POWER AMPLIFIERS; VOLTAGE CONTROL;

LOW NOISE AMPLIFIERS (LNA); NOISE FIGURE; POWER DISSIPATION;

CMOS INTEGRATED CIRCUITS;

EID: 33847136889     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2005.1594183     Document Type: Conference Paper

References (8)

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