A 5.2-GHz LNA in 0.35-μm CMOS utilizing inter-stage series resonance and optimizing the substrate resistance

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 4, 2003, Pages 669-672

  Cha, Choong Yul ^a   Lee, Sang Gug ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

CMOS; Low noise amplifier (LNA); RF; Series inter stage resonance; Substrate resistance effect; Wireless LAN

Indexed keywords

CAPACITORS; CIRCUIT RESONANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC RESISTANCE; LOCAL AREA NETWORKS; MOBILE COMPUTING; SUBSTRATES;

INTER-STAGE SERIES RESONANCE; LOW-NOISE AMPLIFIER; SUBSTRATE RESISTANCE EFFECT; WIRELESS LOCAL AREA NETWORKS;

AMPLIFIERS (ELECTRONIC);

EID: 0037389648     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.809523     Document Type: Article

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