Using synchronization to obtain dynamic logic gates

Physical Review E - Statistical, Nonlinear, and Soft Matter Physics

Volumn 75, Issue 2, 2007, Pages

  Murali, K ^a   Sinha, Sudeshna ^b  

^a ANNA UNIVERSITY   (India)

^b INSTITUTE OF MATHEMATICAL SCIENCES   (India)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER HARDWARE; LOGIC GATES; NONLINEAR SYSTEMS; PARAMETER ESTIMATION;

COMPUTATIONAL HARDWARE; NONLINEAR CIRCUITS;

SYNCHRONIZATION;

EID: 33846862421     PISSN: 15393755     EISSN: 15502376     Source Type: Journal    
DOI: 10.1103/PhysRevE.75.025201     Document Type: Article

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