A scalable configurable architecture for advanced wireless communication algorithms

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 45, Issue 3, 2006, Pages 127-151

  Sarrigeorgidis, Konstantinos ^a   Rabaey, Jan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Low power DSP architectures; MIMO OFDM; QR; SVD; Wireless communication algorithms

Indexed keywords

ALGORITHMS; DATA FLOW ANALYSIS; GRAPH THEORY; INTERCONNECTION NETWORKS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; PROGRAM COMPILERS; SPACE TIME ADAPTIVE PROCESSING;

DEPENDENCE FLOW GRAPH; LOW POWER DSP ARCHITECTURES; MATRIX COMPUTATIONS; WIRELESS COMMUNICATION ALGORITHMS;

WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 33846641118     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11265-006-9762-9     Document Type: Article

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