VLSI systolic arrays for adaptive nulling

IEEE Signal Processing Magazine

Volumn 13, Issue 4, 1996, Pages 29-49

  Rader, C M ^a  

^a MIT LINCOLN LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE FILTERING; ALGORITHMS; ANTENNA ARRAYS; ANTENNAS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL SIGNAL PROCESSING; LEAST SQUARES APPROXIMATIONS; MATRIX ALGEBRA; SIGNAL INTERFERENCE; SIGNAL TO NOISE RATIO; VLSI CIRCUITS;

ADAPTIVE NULLING; LINEAR EQUATIONS; MATRIX UPDATE SYSTOLIC EXPERIMENT; VOLTAGE DOMAIN NULLING;

SYSTOLIC ARRAYS;

EID: 0030191967     PISSN: 10535888     EISSN: None     Source Type: Journal    
DOI: 10.1109/79.526897     Document Type: Article

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