All digital spread spectrum clock generator for EMI reduction

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 1, 2007, Pages 145-150

  Damphousse, Simon ^a   Ouici, Khalid ^a   Rizki, Ahmed ^a   Mallinson, Martin ^a  

^a ESS Technology Inc   (Canada)

Author keywords

Clock; CMOS; Delay line; EMI reduction; Spread spectrum; SSCG

Indexed keywords

EMI REDUCTION; SPREAD SPECTRUM; SPREAD SPECTRUM CLOCK GENERATOR (SSCG); TRIANGULAR WAVEFORMS;

BANDWIDTH; DELAY CIRCUITS; DIGITAL CIRCUITS; ELECTROMAGNETIC WAVE INTERFERENCE; INTERFERENCE SUPPRESSION; VIDEODISKS;

TIMING CIRCUITS;

EID: 33846230017     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.886525     Document Type: Article

References (5)

1. H.-H. Chang, I.-H. Hua, and S.-I. Liu, "A spread-spectrum clock generator with triangular modulation," IEEE J. Solid-State Circuits, vol. 38, no. 4, pp. 673-677, Apr. 2003.
2. W.-T. Chen, J.-C. Hsu, H.-W. Lune, and C.-C. Su, "A spread spectrum clock generator for SATA-II," in Proc. IEEE ISCAS, 2005, pp. 2643-2646.
3. K. B. Hardin, J. T. Fessler, and D. R. Bush, "Spread spectrum clock generation for the reduction of radiated emissions," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1994, pp. 227-231.
4. H. W. Chen and J. C. Wu, "A spread-spectrum clock generator for EMI reduction," IEICE Trans. Electron., pp. 1959-1966, Dec. 2001.
5. J. Y. Michel and C. Neron, "A frequency modulated PLL for EMI reduction in embedded application," in Proc. IEEE Int. ASIC/SOC Conf., 1999, pp. 362-365.