A frequency modulated PLL for EMI reduction in embedded application

Proceedings - 12th Annual IEEE International ASIC/SOC Conference

Volumn , Issue , 1999, Pages 362-365

  Michel, J Y ^a   Neron, C ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CLOCKS; ECONOMIC AND SOCIAL EFFECTS; PHASE LOCKED LOOPS;

CLOCK-JITTER; DIGITAL CLOCKS; EMBEDDED APPLICATION; EMI REDUCTIONS; FREQUENCY MODULATED; HIGH FREQUENCY HF; POWER ATTENUATION; TEST CHIPS;

FREQUENCY MODULATION;

EID: 85013594258     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.1999.806535     Document Type: Conference Paper

References (4)

1. K. B Hardin, J. T. Fesslcr, D. R. Bush, "Spread spectrum clock generation for the reduction of radiated emissions," International Symposium on Electromagnetic Compatibility, Chicago, IL, 1994.
2. H. S. Li, Y. C. Cheng, D. Puar, "Dual-Loop Spread Spectrum Clock Generator," ISSCC digest of technical paper, San Francisco, CA, 1999.
3. B. Miller, "Technique Enhances the Performance of PLL Synthesizers," Microwaves & RF, January 1993, page 59-63.
4. Y. Moon, D. K. Jeong, G. Kim, "Clock Dithering for Electromagnetic Compliance using Spread Spectrum Phase Modulation," ISSCC digest of technical paper, San Francisco, CA, 1999.