A 9-GHz 65-nm Intel® Pentium 4 processor integer execution unit

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 1, 2007, Pages 26-36

  Wijeratne, Sapumal B ^b   Siddaiah, Nanda ^b   Mathew, Sanu K ^a,b   Anders, Mark A ^a,b   Krishnamurthy, Ram K ^a,b   Anderson, Jeremy ^b   Ernest, Matthew ^a,b   Nardin, Mark ^b  

^a IEEE

^b INTEL CORPORATION   (United States)

Author keywords

Address generation unit; ALU shifter rotator; Arithmetic and logic unit; Integer execution unit; Sparse tree

Indexed keywords

ADDRESS GENERATION UNITS; ALU SHIFTER/ROTATOR; ARITHMETIC AND LOGIC UNIT; INTEGER EXECUTION UNIT; SPARSE TREES;

CMOS INTEGRATED CIRCUITS; LEAKAGE CURRENTS; MULTIPLEXING; OPTIMIZATION; PRODUCT DESIGN;

PROGRAM PROCESSORS;

EID: 33846229215     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.885055     Document Type: Article

References (8)

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8. S. Wijeratne, N. Siddaiah, S. Mathew, M. Anders, R. Krishnamurthy, J. Anderson, S. Hwang, M. Ernest, and M. Nardin, "A 9GHz 65nm Intel Pentium 4 processor integer execution core," in IEEE ISSCC Dig. Tech. Papers, 2006, pp. 353-365.