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Volumn E89-C, Issue 12, 2006, Pages 1888-1895

Design and verification of on-chip impedance-matching circuit using transmission-line theory for 2.4 GHz-band wireless receiver front-end

Author keywords

2.4 GHz band wireless LAN; CPW line; Impedance matching circuit; Transmission line theory; 4 resonator

Indexed keywords

CMOS INTEGRATED CIRCUITS; IMPEDANCE MATCHING (ELECTRIC); LOCAL AREA NETWORKS; LOGIC DESIGN; NATURAL FREQUENCIES; RESONANCE; TRANSCEIVERS;

EID: 33845568529     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e89-c.12.1888     Document Type: Conference Paper
Times cited : (8)

References (13)
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    • K. Yoshida, T. Takahashi, H. Kanaya, T. Uchiyama, and Z. Wang, "Superconducting slot antenna with broadband impedance matching circuit," IEEE Trans. Appl. Supercond., vol.11, no.2, pp.103-106, June 2001.
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    • Design and performance of an electrically small slot loop antenna with a miniaturized superconducting matching circuit
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    • Y. Tsutsumi, H. Kanaya, and K. Yoshida, "Design and performance of an electrically small slot loop antenna with a miniaturized superconducting matching circuit," IEEE Trans. Appl. Supercond., vol.15, no.2, pp.1020-1023, June 2005.
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