Verifying statemate statecharts using CSP and FDR

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4260 LNCS, Issue , 2006, Pages 324-341

  Roscoe, A W ^a   Wu, Z ^a  

^a UNIVERSITY OF OXFORD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; MATHEMATICAL MODELS; PRODUCT DESIGN; SPECIFICATIONS;

STATEMATE STATECHARTS;

LARGE SCALE SYSTEMS;

EID: 33845234019     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11901433_18     Document Type: Article

References (26)

1. R. Anderson, P. Beame, S. Burns, W. Chan, F. Modugno, D. Notkin, and J. Reese, Model checking large software specifications, IEEE Transactions on Software Engineering, Vol. 24, No. 7, pp. 498-520, 1998.
2. T. Bienmuller, J. Bohn, H. Brinkmann, U. Brockmeyer, W. Damm, H. Hungar, and P. Jansen, Verification of automotive control units, in E.-R. Olderog and B. Steffen (Eds.), Correct System Design, Springer Verlag, Berlin, 1999,number 1710 in LNCS, pp. 319-341.
3. T. Bienmuller, U. Brockmeyer, W. Damm, G. Dohmen, H.-J. Holberg, H. Hungar, B. Josko, R. Schlor, G. Wittich, H. Wittke, G. Clements, J. Rowlands, and E. Sefton, Formal verification of an avionics application using abstraction and symbolic model checking, in F. Redmill and T. Anderson (Eds.), Towards System Safety - Proceedings of the Seventh Safety-critical Systems Symposium, Huntingdon, UK, Safety-critical Systems Club, Springer Verlag, Berlin, 1999, pp. 150-173.
4. J.R. Burch, E.M. Clarke, and D.E. Long, Symbolic model checking with partitioned transition relations, In VLSI 91, Edinburgn, Scotland, 1990.
5. J.R. Burch, E.M. Clarke, K.L.McMillan, and D.L.Dill, Sequential circuit verification using symbolic model checking, In 27th ACM/IEEE Design Automation Conference, 1990.
6. J.R. Burch, E.M. Clarke, K.L.McMillan, D.L.Dill, and J. Hwang, Symbolic model checking: 10E20 states and beyond, In LICS, 1990.
7. T. Bienmuller, W. Damm and H. Wittke, The Statemeat Verification Environment - Making it real, In: Proc. CAV, LNCS 1855, pp. 561-561, Springer, 2000.
8. E.M. Clarke, O. Grumberg and D.E. Long, Model Checking and Abstraction, In proceedings of the Nineteenth Annual ACM Symposium on Principles of Programming Languages,1992.
9. W. Damm and D. Harel, LSCs: breathing life into message sequence charts, in FMOODS'99 IFIP TC6/WG6.1 Third International Conference on Formal Methods for Open Object-Based Distributed Systems, Kluwer Academic Publishers, NY, 1999.
10. W. Damm, B. Josko, H. Hungar, and A. Pnueli, A compositiona real-time semantics of STATEMATE designs, in W.-P. de Roever (Ed.), Proceedings, International Symposium on Compositionality-The Significant Diference, Springer-Verlag, 1998, Lecture Notes in Computer Science.
11. W. Damm and J. Klose, Verification of a radio-based signalling system using the Statemate verification environment, Formal Methods in System Design 19:121-141, 2001.
12. H. Eshuis and R. Wieringa, A Formal Semantics for UML Activity Diagrams C Formalising Workflow Models, Technical Report, 2001.
13. Formal Systems (Europe) Ltd., Failures-Divergence Refinement, User Manual, obtainable from http://wwv.fse1.com/fdr2_manual.html
14. K. Fuhrmann and J. Hiemer, Formal Verification of STATEMATE-Statecharts, Citeseer.nj.nec.com/255163.html, 2001.
15. W.J. Fokkink and P. Hollingshead, Verification of interlockings; from control tables to ladder logic diagrams, in Proceedings of the 3rd Workshop on Formal Methods for Industrial Critical Systems-FMICS'98, Amsterdam. Stichting Mathematisch Centrum, 1998.
16. K. Feyerabend and B. Josko, VIS: A visual formalism for real time requirement specifications, in Proceedings of the 4th International AMAST Workshop on Real-Time Systems and Concurrent and Distributed Software, ARTS'97, Lecture Notes in Computer Science 1231, 1997, pp. 156-168.
17. T.V. Group, VIS: A system for verification and synthesis, in 8th international Conference on Computer Aided Verification, number 1102 in LNCS, 1996.
18. D. Harel and A. Naamad, The Statemate Semantics of Statecharts, Technical Report, i-Logix, 1995.
19. D. Harel, H. Lachover, A. Naamad, A. Pnueli, M. Politi, R. Sherman, and A.S. Trauring, Statemate: A Working Environment for the Development of Complex Reactive Systems, IEEE Transactions on Software Engineering, 16, 4, 1990.
20. J. Hudak, S.C. Dorda, D.P. Gluch, G. Lewis and C. Weinstock, Model-Based Verification: Abstraction Guidelines, Technical Note CMU/SEI-2002-TN-001, 2002.
21. D. Harel and M. Politi, Modeling Reactive Systems with Statecharts: The STATEMATE Approach, Part No.D-1100-43, i-Logix Inc., Three Riverside Drive, Andover, MA 01810, June 1996.
22. The MathWorks, Stateflow, User Manual, obtainable from http://www.mathworks.com/access/helpdesk/help/toolbox/stateflow/ug/
23. E. Mikk, Y. Lakhnech, C. Petersohn and M. Siegel, On Formal Semantics of Statecharts as Supported by STATEMATE, Technical Report, BCS-FACS Northern Formal Methods Workshop, 2, Ilkley, 1997.
24. L.E. Moser, Y. Ramakrishna, G. Kutty, P. Melliar-Smith, and L. Dillon, A graphical environment for design of concurrent real-time systems, ACM Transactions on Software Engineering and Methodology, Vol.6, No. 1, pp.31-79, 1997.
25. A.W. Roscoe The theory and practice of concurrency, Prentice-Hall International, 1998.
26. A.W. Roscoe, Compiling Statemate Statecharts into CSP and verifying them using FDR - abstract, Technical Report, 2003.