CMOS compatible SOI MESFETs for extreme environment applications

IEEE Aerospace Conference Proceedings

Volumn 2005, Issue , 2005, Pages

  Vandersand, James ^a   Kushner, Vadim ^b   Yang, Jinman ^b   Blalock, Benjamin ^a   Thornton, Trevor ^b  

^a University of Tennessee Knoxville   (United States)

^b Arizona State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; GATES (TRANSISTOR); MESFET DEVICES; SCHOTTKY BARRIER DIODES;

DRAIN CURRENT; PROCESS FLOW; PROTOTYPE DEVICES;

SILICON ON INSULATOR TECHNOLOGY;

EID: 33751509962     PISSN: 1095323X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AERO.2005.1559564     Document Type: Conference Paper

References (7)

1. J. Yang, J. Y. Spann, R. Anderson, and T. J. Thornton, "High-frequency performance of sub-threshold SOI MESFETs," IEEE Electron Device Lett., vol. 25, pp. 652-654, 2004.
2. V. Kushner, J. Vandersaand, J. Yang, J. Y. Spann, R. Anderson, B. J. Blalock and T. J. Thornton in preparation.
3. J. Y. Spann, P. Jaconelli, Z. Wu, T. J. Thornton, W. T. Kemp, and S. J. Sampson, "The Schottky Junction Transistor - a contender for ultra low-power radiationtolerant space electronics," presented at Aerospace Conference, 2003. Proceedings. 2003 IEEE, 2003, pp 5_2447-2445_2453.
4. K. P. MacWilliams and J. D. Plummer, "Device Physics and Technology of Complementary Silicon VLSI MESFETs for VLSI Applications" IEEE Trans. Electron Devices vol. 38, pp. 2619-2631, 1991.
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6. C. S. Hou and C. Y. Wu, "A design strategy for short gate length SOI MESFETs," Solid-State Electronics, vol. 39, pp. 361-367, 1996
7. U. Magnusson, J. Tiren, H. Norde, and H. Bleichner, "Subthreshold Behavior of Silicon Mesfets on SOS and Bulk Silicon Substrates," Solid-State Electronics, vol. 32, pp. 931-934, 1989.