Verification of executable pipelined machines with bit-level interfaces

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 855-862

  Manolios, Panagiotis ^a   Srinivasan, Sudarshan K ^b  

^a Georgia Institute of Technology   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; COMPUTER ARCHITECTURE; DECISION THEORY; INTERFACES (COMPUTER); SET THEORY; THEOREM PROVING;

PIPELINED MACHINES; SET ARCHITECTURE;

PIPING SYSTEMS;

EID: 33751412805     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560182     Document Type: Conference Paper

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