Hardware synthesis from guarded atomic actions with performance specifications

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 784-791

  Rosenband, Daniel L ^a   Arvind, ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; PROGRAM PROCESSORS; SCHEDULING; SYSTEMS ANALYSIS;

PIPELINED PROCESSORS; RULE COMPOSITION;

COMPUTER HARDWARE;

EID: 33751400837     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560170     Document Type: Conference Paper

References (9)

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3. Bluespec, Inc., Benchmarking of Bluespec Compiler Uncovers No Compromises in Quality of Results (QoR) www.bluespec.com/images/pdfs/InterraReport042604. pdf
4. Dave, N., Designing a Reorder Buffer in Bluespec. in MEMOCODE, (San Diego, 2004).
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8. Rosenband, D.L., The Ephemeral History Register: Flexible Scheduling for Rule-Based Designs, in MEMOCODE, (2004).
9. Terese Term Rewriting Systems. Cambridge University Press, Cambridge, UK, 2003.