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Volumn , Issue , 2004, Pages 93-102

Designing a reorder buffer in bluespec

Author keywords

[No Author keywords available]

Indexed keywords

BLUESPEC COMPLIERS; SUPERSCALAR PROCESSOR; VLSI CHIPS;

EID: 28344449338     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (6)

References (11)
  • 7
    • 4444349911 scopus 로고    scopus 로고
    • Dept. of Electrical Engineering and Computer Science: Massachusetts Institute of Technology
    • J. C. Hoe, Operation-Centric Hardware Description and Synthesis, in Dept. of Electrical Engineering and Computer Science: Massachusetts Institute of Technology, 2000, p. 139.
    • (2000) Operation-centric Hardware Description and Synthesis , pp. 139
    • Hoe, J.C.1
  • 11
    • 4444231208 scopus 로고    scopus 로고
    • From high-level descriptions to VLSI circuits
    • J. Straunstrup, and M. R. Greenstreet, From High-Level Descriptions to VLSI Circuits, BIT, 28 (3). 620-638.
    • BIT , vol.28 , Issue.3 , pp. 620-638
    • Straunstrup, J.1    Greenstreet, M.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.