Study of the post-etch cleaning compatibility with dense and porous ULK materials - characterization of the process impact

Microelectronic Engineering

Volumn 83, Issue 11-12, 2006, Pages 2319-2323

  Rebiscoul D ^a   Puyrenier, B ^a   Broussous, L ^b   Louis, D ^a   Passemard, G ^b  

^a CEA GRENOBLE   (France)

^b STMICROELECTRONICS   (France)

Author keywords

Characterization; Compatibility; Post via etch cleaning; Ultra low K

Indexed keywords

COPPER; ELECTRIC POWER SYSTEM INTERCONNECTION; ELECTRONIC STRUCTURE; ETCHING; HYDROPHOBICITY; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; POROUS MATERIALS;

ELECTRICAL MODIFICATIONS; HYDROPHOBIC PROPERTY; POST-VIA-ETCH CLEANING; ULTRA LOW-K DIELECTRICS;

DIELECTRIC MATERIALS;

EID: 33751252001     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2006.10.025     Document Type: Article

References (6)

1. The International Technology Roadmap for Semiconductors, Semiconductor Industry Association, Interconnect (2005).
2. M.R. Baklanov, Q.T. Le, E. Kesters, F. Iacopi, J. Van Aelst, H. Struyf, W. Boullart, S. Vanhaelemeersch, K. Maex, in: Proceedings of the IEEE 2004 International Interconnect Technology Conference, 2004, pp. 187-189.
3. Fayolle M., Torres J., Passemard G., Fusalba F., Fanget G., and Louis D. Microelec. Eng. 64 (2002) 35-42
4. V. Jousseaume, M. Assous, A. Zenasni, S. Maitrejean, B. Remiat, P. Leduc, H. Trouve, C. Le-Cornec, M. Fayolle, A. Roule, F. Ciaramella, D. Bouchu, T. David, A. Roman, T. Morel, D. Rebiscoul, G. Prokopowicz, M. Jackman, C. Guedj, D. Louis, M. Gallagher, G. Passemard, in: Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005, pp. 60-62.
5. Tan Y.S., Chooi S.Y.M., Sin C.-Y., Ee P.-Y., Srinivasan M.P., and Pehkonen S.O. Thin Solid Films 462-463 (2004) 250-256
6. Humbert A., Mage L., Goldberg C., Junker K., Proenca L., and Lhuillier J.B. Microelec. Eng. 82 3-4 (2005) 399-404