Electrical properties of nonvolatile latches for new logic application

Integrated Ferroelectrics

Volumn 47, Issue , 2002, Pages 71-78

  Fujimori, Y ^a   Nakamura, T ^a   Takasu, H ^a  

^a ROHM CO LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; FERROELECTRICITY; FORMAL LOGIC; NONVOLATILE STORAGE; POLARIZATION; STANDBY POWER SYSTEMS;

FERROELECTRIC CAPACITORS; FERROELECTRIC REMANENT POLARIZATION; SPEED DEGRADATION;

FLIP FLOP CIRCUITS;

EID: 33751179020     PISSN: 10584587     EISSN: 16078489     Source Type: Conference Proceeding    
DOI: 10.1080/10584580215414     Document Type: Article

References (6)

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2. H. Notani, M. Koyama, R. Mano, H. Makino and Y. Matsuda; Digest of Symposium on VLSI Circuits, (2001) p.221-224.
3. K. Kumagai, H. Iwaki, H. Yoshida, H. Suzuki, T. Yamada and S. Kurosawa; Digest of Symposium on VLSI Circuits, (1998) p.44-45.
4. T. Miwa, J. Yamada and H. Koike, "A 512 Kbit low-voltage NV-SRAM with the size of a conventional SRAM," Digest of Symposium on VLSI Circuits, no. 12-4, pp.129-132, Kyoto, Japan, June 2001.
5. T. Kijima and H. Ishiwara, "A Novel Solid Solution Exhibiting Excellent Ferroelectricity," Extended Abstracts of FeRAM 2001, no.WO3-1, pp.67-68, Gotemba, Japan, Nov. 2001.
6. T. Nishihara and Yasuyuki Ito, "A Quasi-Matrix Ferroelectric Memory for Future Silicon Storage," ISSCC Digest of Technical Papers, no.9-5, pp.160-161, San Francisco, Feb. 2001.