A quasi-matrix ferroelectric memory for future silicon storage

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 160-161+455+151

  Nishihara, Toshiyuki ^a   Ito, Yasuyuki ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FLASH MEMORY; GAIN CONTROL; MOS DEVICES; RANDOM ACCESS STORAGE; SEMICONDUCTING SILICON;

FERROELECTRIC MEMORIES;

FERROELECTRIC DEVICES;

EID: 0036111659     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. 2 256 Mb NAND flash with shallow trench isolation technology
2. An experimental 512-bit nonvolatile memory with ferroelectric storage cell
3. A single-transistor ferroelectric memory cell
4. The future of ferroelectric memories