-
1
-
-
0015680909
-
Logical reversibility of computation
-
0018-8646
-
Bennett, C.H.: ' Logical reversibility of computation ', IBM J. Res. Dev., 1973, 17, p. 525-532 0018-8646
-
(1973)
IBM J. Res. Dev.
, vol.17
, pp. 525-532
-
-
Bennett, C.H.1
-
2
-
-
0000328287
-
Irreversibility and heat generation in the computing process
-
0018-8646
-
Landauer, R.: ' Irreversibility and heat generation in the computing process ', IBM J. Res. Dev., 1961, 5, p. 183-191 0018-8646
-
(1961)
IBM J. Res. Dev.
, vol.5
, pp. 183-191
-
-
Landauer, R.1
-
3
-
-
0035804255
-
A scheme for efficient quantum computation with linear optics
-
10.1038/35051009 0028-0836
-
Knill, E., Laflamme, R., and Milburn, G.J.: ' A scheme for efficient quantum computation with linear optics ', Nature, 2001, 409, p. 46-52 10.1038/35051009 0028-0836
-
(2001)
Nature
, vol.409
, pp. 46-52
-
-
Knill, E.1
Laflamme, R.2
Milburn, G.J.3
-
5
-
-
0027168191
-
Reversible electronic logic using switches
-
10.1088/0957-4484/4/1/002 0957-4484
-
Merkle, R.C.: ' Reversible electronic logic using switches ', Nanotechnology, 1993, 4, p. 21-40 10.1088/0957-4484/4/1/002 0957-4484
-
(1993)
Nanotechnology
, vol.4
, pp. 21-40
-
-
Merkle, R.C.1
-
6
-
-
0027579741
-
Two types of mechanical reversible logic
-
10.1088/0957-4484/4/2/007 0957-4484
-
Merkle, R.C.: ' Two types of mechanical reversible logic ', Nanotechnology, 1993, 4, p. 114-131 10.1088/0957-4484/4/2/007 0957-4484
-
(1993)
Nanotechnology
, vol.4
, pp. 114-131
-
-
Merkle, R.C.1
-
7
-
-
3042515336
-
Synthesis of reversible logic
-
Paris, France, February
-
Agrawal, A., and Jha, N.K.: ' Synthesis of reversible logic ', DATE, Paris, France, February, 2004, 2, p. 1384-1385
-
(2004)
DATE
, vol.2
, pp. 1384-1385
-
-
Agrawal, A.1
Jha, N.K.2
-
8
-
-
4444239912
-
A new heuristic algorithm for reversible logic synthesis
-
June
-
Kerntopf, P.: ' A new heuristic algorithm for reversible logic synthesis ', Proc. Design Automation Conf. DAC, June, 2004, p. 834-837
-
(2004)
Proc. Design Automation Conf. DAC
, pp. 834-837
-
-
Kerntopf, P.1
-
9
-
-
10444278770
-
Logic synthesis with cascades of new reversible gate families
-
6th March
-
Khan, M.H.A., and Perkowski, M.: ' Logic synthesis with cascades of new reversible gate families ', 6th, Int. Symp. on Representations and Methodology of Future Computing Technology, March, 2003, p. 43-55
-
(2003)
Int. Symp. on Representations and Methodology of Future Computing Technology
, pp. 43-55
-
-
Khan, M.H.A.1
Perkowski, M.2
-
10
-
-
10444278770
-
Multi-output ESOP synthesis with cascades of new reversible gate family
-
6th March
-
Khan, M.H.A., and Perkowski, M.: ' Multi-output ESOP synthesis with cascades of new reversible gate family ', 6th, Int. Symp. on Representations and Methodology of Future Computing Technologies, March, 2003, p. 144-153
-
(2003)
Int. Symp. on Representations and Methodology of Future Computing Technologies
, pp. 144-153
-
-
Khan, M.H.A.1
Perkowski, M.2
-
11
-
-
8344281996
-
Reversible cascades with minimal garbage
-
10.1109/TCAD.2004.836735 0278-0070
-
Maslov, D., and Dueck, G.: ' Reversible cascades with minimal garbage ', IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 2004, 23, (11), p. 1497-1509 10.1109/TCAD.2004.836735 0278-0070
-
(2004)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.23
, Issue.11
, pp. 1497-1509
-
-
Maslov, D.1
Dueck, G.2
-
12
-
-
20444459774
-
Toffoli network synthesis with templates
-
10.1109/TCAD.2005.847911 0278-0070
-
Maslov, D., Dueck, G.W., and Miller, D.M.: ' Toffoli network synthesis with templates ', IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 2005, 24, (6), p. 807-817 10.1109/TCAD.2005.847911 0278-0070
-
(2005)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.24
, Issue.6
, pp. 807-817
-
-
Maslov, D.1
Dueck, G.W.2
Miller, D.M.3
-
13
-
-
17044458279
-
Spectral and two-place decomposition techniques in reversible logic
-
August
-
Miller, D.M.: ' Spectral and two-place decomposition techniques in reversible logic ', Midwest Symp. on Circuits and Systems, August, 2002
-
(2002)
Midwest Symp. on Circuits and Systems
-
-
Miller, D.M.1
-
14
-
-
0348183555
-
Logic synthesis of reversible wave cascades
-
June
-
Mishchenko, A., and Perkowski, M.: ' Logic synthesis of reversible wave cascades ', IWLS, June, 2002, p. 197-202
-
(2002)
IWLS
, pp. 197-202
-
-
Mishchenko, A.1
Perkowski, M.2
-
15
-
-
33644663193
-
Efficient synthesis of linear reversible circuits
-
Temecula Creek, CA, June
-
Patel, K.N., Markov, I.L., and Hayes, J.P.: ' Efficient synthesis of linear reversible circuits ', IWLS, Temecula Creek, CA, June, 2004, p. 4470-4477
-
(2004)
IWLS
, pp. 4470-4477
-
-
Patel, K.N.1
Markov, I.L.2
Hayes, J.P.3
-
16
-
-
84983132669
-
Regularity and symmetry as a base for efficient realization of reversible logic circuits
-
Perkowski, M., Kerntopf, P., Buller, A., Chrzanowska-Jeske, M., Mishchenko, A., Song, X., Al-Rabadi, A., Jozwiak, L., Coppola, A., and Massey, B.: ' Regularity and symmetry as a base for efficient realization of reversible logic circuits ', IWLS, 2001, p. 245-252
-
(2001)
IWLS
, pp. 245-252
-
-
Perkowski, M.1
Kerntopf, P.2
Buller, A.3
Chrzanowska-Jeske, M.4
Mishchenko, A.5
Song, X.6
Al-Rabadi, A.7
Jozwiak, L.8
Coppola, A.9
Massey, B.10
-
17
-
-
0038718548
-
Synthesis of reversible logic circuits
-
0278-0070
-
Shende, V.V., Prasad, A.K., Markov, I.L., and Hayes, J.P.: ' Synthesis of reversible logic circuits ', IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 2003, 22, (6), p. 723-729 0278-0070
-
(2003)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.22
, Issue.6
, pp. 723-729
-
-
Shende, V.V.1
Prasad, A.K.2
Markov, I.L.3
Hayes, J.P.4
-
18
-
-
57649145355
-
Quantum Boolean circuit construction and layout under locality constraint
-
Tsai, I.M., and Kuo, S.Y.: ' Quantum Boolean circuit construction and layout under locality constraint ', IEEE Conf. on Nanotechnology, 2001, p. 111-116
-
(2001)
IEEE Conf. on Nanotechnology
, pp. 111-116
-
-
Tsai, I.M.1
Kuo, S.Y.2
-
19
-
-
33750491347
-
-
IBM's test-tube quantum computer makes history. IBM T.J. Watson Research Center, http://researchweb.watson.ibm.com/resources/news/20011219_quantum.shtml, December 2001
-
IBM's test-tube quantum computer makes history. IBM T.J. Watson Research Center, http://researchweb.watson.ibm.com/resources/news/20011219_quantum.shtml, December 2001
-
-
-
-
20
-
-
33750435297
-
-
Hughes, R., et al.: 'Quantum computing roadmap', University of California for the National Nuclear Security Administration, of the US Department of Energy, http://qist.lanl.gov, April 2004
-
Hughes, R., et al.: 'Quantum computing roadmap', University of California for the National Nuclear Security Administration, of the US Department of Energy, http://qist.lanl.gov, April 2004
-
-
-
-
21
-
-
33750439926
-
-
Technical quant-ph/0511008 November, 2005
-
' Comparison of the cost metrics for reversible and quantum logic synthesis ', Technical, quant-ph/0511008, November, 2005
-
-
-
-
22
-
-
33846301407
-
The cost of quantum gates
-
submitted to
-
Lee, S., Lee, S., Kim, T., Lee, J., Biamonte, J., and Perkowski, M.: ' The cost of quantum gates ', IEEE Int. J. Multi Valued Logic, 2005, submitted to
-
(2005)
IEEE Int. J. Multi Valued Logic
-
-
Lee, S.1
Lee, S.2
Kim, T.3
Lee, J.4
Biamonte, J.5
Perkowski, M.6
-
23
-
-
33750436336
-
-
Toffoli, T.: 'Reversible computing', Tech memo MIT/LCS/TM-151, MIT Lab for Com Sci., 1980
-
Toffoli, T.: 'Reversible computing', Tech memo MIT/LCS/TM-151, MIT Lab for Comp. Sci., 1980
-
-
-
-
24
-
-
34748841353
-
Elementary gates for quantum computation
-
10.1103/PhysRevA.52.3457
-
Barenco, A., Bennett, C.H., Cleve, R., DiVinchenzo, D.P., Margolus, N., Shor, P., Sleator, T., Smolin, J.A., and Weinfurter, H.: ' Elementary gates for quantum computation ', Phys. Rev. A, 1995, 52, p. 3457-3467 10.1103/PhysRevA.52. 3457
-
(1995)
Phys. Rev. A
, vol.52
, pp. 3457-3467
-
-
Barenco, A.1
Bennett, C.H.2
Cleve, R.3
Divinchenzo, D.P.4
Margolus, N.5
Shor, P.6
Sleator, T.7
Smolin, J.A.8
Weinfurter, H.9
-
25
-
-
33646904507
-
Quantum circuit simplification using templates
-
March
-
Maslov, D., Young, C., Miller, D.M., and Dueck, G.W.: ' Quantum circuit simplification using templates ', Proc. DATE, March, 2005
-
(2005)
Proc. DATE
-
-
Maslov, D.1
Young, C.2
Miller, D.M.3
Dueck, G.W.4
-
26
-
-
0002433737
-
Quantum mechanical computers
-
Feynman, R.: ' Quantum mechanical computers ', Optic. News, 1985, 11, p. 11-20
-
(1985)
Optic. News
, vol.11
, pp. 11-20
-
-
Feynman, R.1
-
28
-
-
0005909360
-
Comments on sympathy: Fast exact minimization of fixed polarity Reed-Muller expansion for symmetric functions
-
0278-0070
-
Butler, J.T., Dueck, G.W., Yanushkevich, S., and Shmerko, V.: ' Comments on sympathy: fast exact minimization of fixed polarity Reed-Muller expansion for symmetric functions ', IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., 2000, 19, (11), p. 1386-1388 0278-0070
-
(2000)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.19
, Issue.11
, pp. 1386-1388
-
-
Butler, J.T.1
Dueck, G.W.2
Yanushkevich, S.3
Shmerko, V.4
-
29
-
-
0042897410
-
-
Vysshaya Shkola, Moscow, Russia in Russian
-
Gashkov, S.B., and Chubarikov, V.N.: ' Arithmetic, algorithms, complexity of evaluations ', (Vysshaya Shkola, Moscow, Russia, 2000), in Russian
-
(2000)
Arithmetic, Algorithms, Complexity of Evaluations
-
-
Gashkov, S.B.1
Chubarikov, V.N.2
-
30
-
-
0012928469
-
Fast heuristic minimization of exclusive sum-of-products
-
5th August
-
Mishchenko, A., and Perkowski, M.: ' Fast heuristic minimization of exclusive sum-of-products ', 5th, Int. Reed-Muller Workshop, August, 2001, p. 242-250
-
(2001)
Int. Reed-Muller Workshop
, pp. 242-250
-
-
Mishchenko, A.1
Perkowski, M.2
-
31
-
-
25544459735
-
Reversible logic and quantum computers
-
10.1103/PhysRevA.32.3266
-
Peres, A.: ' Reversible logic and quantum computers ', Phys. Rev. A, 1985, 32, p. 3266-3276 10.1103/PhysRevA.32.3266
-
(1985)
Phys. Rev. A
, vol.32
, pp. 3266-3276
-
-
Peres, A.1
-
32
-
-
33750448724
-
-
Maslov, D., Dueck, G., Scott, N.: 'Reversible logic synthesis benchmarks', http://www.cs.uvic.ca/~dmaslov/, August 2004
-
Maslov, D., Dueck, G., Scott, N.: 'Reversible logic synthesis benchmarks', http://www.cs.uvic.ca/~dmaslov/, August 2004
-
-
-
|