1/f gate tunneling current noise model of ultrathin Oxide MOSFETs

IEEE International Conference on Microelectronic Test Structures

Volumn 2006, Issue , 2006, Pages 193-198

  Martinez, F ^a   Soliveres, S ^a   Leyris, C ^a   Valenza, M ^a  

^a UNIVERSITÉ MONTPELLIER II   (France)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN VOLTAGE; GATE NOISE; GATE POLYDEPLETION; ULTRATHIN OXIDES;

COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRON TUNNELING; GATES (TRANSISTOR); MATHEMATICAL MODELS; QUANTUM THEORY; SPURIOUS SIGNAL NOISE; ULTRATHIN FILMS;

MOSFET DEVICES;

EID: 33749520204     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICMTS.2006.1614302     Document Type: Conference Paper

References (15)

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