Globally asynchronous locally synchronous wrapper circuit based on clock gating

Proceedings - IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures 2006

Volumn 2006, Issue , 2006, Pages 199-204

  Amini, Esmail ^a   Najibi, Mehrdad ^a   Pedram, Hossein ^a  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CLOCKS; ERROR ANALYSIS; ERROR CORRECTION; MICROPROCESSOR CHIPS; ROBUSTNESS (CONTROL SYSTEMS);

CLOCK GENERATION; SYNCHRONOUS MODULES; SYNCHRONOUS WRAPPER CIRCUITS; VITERBI ERROR DETECTION;

NETWORKS (CIRCUITS);

EID: 33749349573     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2006.48     Document Type: Conference Paper

References (11)

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