Accurate fault modeling and fault simulation of resistive bridges

Proceedings - 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 1998

Volumn 1998-December, Issue , 1998, Pages 102-107

  Sar Dessai, V ^a   Walker, D M H ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; RANDOM ACCESS STORAGE; VLSI CIRCUITS;

BENCHMARK CIRCUIT; BRIDGING FAULT; FAULT COVERAGES; FAULT SIMULATION; POWER SUPPLY VOLTAGE; RESISTIVE BRIDGE; RESISTIVE BRIDGING FAULTS; UNUSUAL BEHAVIORS;

FAULT TOLERANCE;

EID: 33748550543     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFTVS.1998.732156     Document Type: Conference Paper

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