Bridging fault coverage improvement by power supply control

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1996, Pages 338-343

  Renovell, M ^a   Huc, P ^a   Bertrand, Y ^a  

^a UNIV MONTPELLIER   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC RESISTANCE; FAILURE ANALYSIS; LOGIC GATES; MATHEMATICAL MODELS; VOLTAGE MEASUREMENT;

BRIDGING FAULT; PARAMETRIC MODEL; POWER SUPPLY VOLTAGE;

INTEGRATED CIRCUIT TESTING;

EID: 0029713161     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)