Parametric timing estimation with Newton-Gregory formulae

Concurrency and Computation: Practice and Experience

Volumn 18, Issue 11, 2006, Pages 1435-1463

  Van Engelen, Robert A ^a   Gallivan, Kyle A ^a   Walsh, Burt ^a  

^a Florida State University   (United States)

Author keywords

Code analysis; Interpolation; Parametric estimation; WCET

Indexed keywords

DECISION MAKING; INTERPOLATION; ITERATIVE METHODS; MULTIMEDIA SYSTEMS; POLYNOMIALS; SCHEDULING;

CODE ANALYSIS; MULTIMEDIA CODES; SYMBOLIC LOOP; WCET;

PARAMETER ESTIMATION;

EID: 33748468771     PISSN: 15320626     EISSN: 15320634     Source Type: Journal    
DOI: 10.1002/cpe.1015     Document Type: Conference Paper

References (39)

1. Lee S, Sakurai T. Run-time voltage hopping for low-power real-time systems. Proceedings of the Design Automation Conference, 2000; 806-809.
2. Pillai P, Shin KG. Real-time dynamic voltage scaling for low-power embedded operating systems. Proceedings of the 18th ACM Symposium on Operating Systems Principles. ACM Press: New York, 2001.
3. Shin D, Kim J, Lee S. Low-energy intra-task voltage scheduling using static timing analysis. Proceedings of the Design Automation Conference, 2001; 438-443.
4. Shin Y, Choi K. Power conscious fixed priority scheduling for hard real-time systems. Proceedings of the Design Automation Conference, 1999; 134-139.
5. Liu G, Layland J. Scheduling algorithms for multiprogramming in a hard real-time environment. Journal of the ACM 1973; 20(1):46-61.
6. Walsh B, van Engelen R, Gallivan K, Birch J, Shou Y. Parametric intra-task dynamic voltage scheduling. Proceedings of the Workshop on Compilers and Operating Systems for Lower Power (COLP 2003), 2003.
7. Healy C, Sjödin M, Rustagi V, Whalley D, van Engelen R. Supporting timing analysis by automatic bounding of loop iterations. Real-Time Systems 2000; 18(2-3):129-156.
8. Lim S-S et al. An accurate worst case timing analysis for RISC processors. Software Engineering 1995; 21(7):593-604.
9. Park CY. Predicting program execution times by analyzing static and dynamic program paths. Real-Time Systems 1993; 5(1):31-61.
10. Altenbernd P. The false path problem in hard real-time programs. Proceedings of the 8th Euromicro Workshop on Real-Time Systems, 1996; 102-107.
11. Healy C, Arnold R, Mueller F, Whalley D, Harmon M. Bounding pipeline and instruction cache performance. IEEE Transactions on Computers 1999; 48(1):53-70.
12. Lundqvist T, Stenström P. Integrating path and timing analysis using instruction-level simulation techniques. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems (LCTES) (Lecture Notes in Computer Science, vol. 1474). Springer: Berlin, 1998; 1-15.
13. Stappert F, Ermedahl A, Engblom J. Efficient longest executable path search for programs with complex flows and pipeline effects. CASES, 2001; 132-140.
14. Engblom J, Ermedahl A, Sjoedin M, Gubstafsson J, Hansson H. Worst-case execution-time analysis for embedded real-time systems. Journal of Software Tools for Technology Transfer 2003; 4(4):437-455.
15. Steven Li Y-T, Malik S. Performance analysis of embedded software using implicit path enumeration. Proceedings of the Workshop on Languages, Compilers, and Tools for Real-Time Systems (LCTES), 1995; 88-98.
16. Steven Li Y-T, Malik S. Wolfe A. Efficient microarchitecture modeling and path analysis for real-time software. IEEE Real-Time Systems Symposium, 1995; 298-307.
17. Papadimtriou CH, Steiglitz K. Combinatorial Optimization: Algorithms and Complexity. Prentice-Hall: Englewood Cliffs, NJ, 1982.
18. Lisper B. Fully automatic, parametric worst-case execution time analysis. Proceedings of the 3rd International Workshop on Worst-Case Execution Time (WCET) Analysis, 2003.
19. Vivancos E, Healy C, Mueller F, Whalley D. Parametric timing analysis. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems (LCTES), 2003; 88-93.
20. Chapman R. Worst-case timing analysis via finding longest paths in SPARK Ada basic-path graphs. Technical Report ycs-94-246. Department of Computer Science, York University, 1994.
21. Haghighat MR, Polychronopoulos CD. Symbolic program analysis and optimization for parallelizing compilers. Proceedings of the 5th Annual Workshop on Languages and Compilers for Parallel Computing, New Haven, CT, 1992 (Lecture Notes in Computer Science, vol. 757). Springer: Berlin, 1992; 538-562.
22. Tawbi N. Estimation of nested loops execution time by integer arithmetic in convex polyhydra. Proceedings of the 8th International Parallel Processing Symposium. IEEE Computer Society Press: Los Alamitos, CA, 1994; 217-221.
23. Sakellariou R. On the quest for perfect load balance in loop-based parallel computations. PhD Thesis, Department of Computer Science, University of Manchester, 1996.
24. Pugh W. Counting solutions to Presburger formulas: How and why. Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Orlando, FL, June 1994. ACM Press: New York, 1994; 121-134.
25. Pugh W, Wonnacott D. Eliminating false data dependences using the Omega test. Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), San Francisco, CA, June 1992. ACM Press: New York, 1992; 140-151.
26. Clauss P. Counting solutions to linear and nonlinear constraints through Ehrhart polynomials: Applications to analyze and transform scientific programs. Proceedings of the 1996 ACM International Conference on Supercomputing. ACM Press: New York, 1996; 278-285.
27. Loechner V, Wilde DK. Parameterized polyhedra and their vertices. International Journal of Parallel Programming 1997; 25(6):525-549.
28. Sakellariou R. Symbolic evaluation of sums for parallelising compilers. Proceedings of the IMACS World Congress on Scientific Computation, Modelling and Applied Mathematics. Wissenschaft and Technik: Berlin, 1997; 685-690.
29. Bachmann O. Chains of recurrences. PhD Thesis, Kent State University, College of Arts and Sciences, 1996.
30. Haghighat MR. Symbolic Analysis for Parallelizing Compilers. Kluwer Academic: Dordrecht, 1995.
31. Graham RL, Knuth DE, Patashnik O. Concrete Mathematics. Addison-Wesley: Reading, MA, 1991.
32. Blume W, Eigenmann R. Demand-driven, symbolic range propagation. Proceedings of the 8th International Workshop on Languages and Compilers for Parallel Computing, Columbus, OH, August 1995; 141-160.
33. Fahringer T. Efficient symbolic analysis for parallelizing compilers and performance estimators. Supercomputing 1998; 12(3):227-252.
34. Harrison WH. Compiler analysis of the value ranges of variables. IEEE Transactions on Software Engineering 1977; 3(3):243-250.
35. Ratchek H, Rokne J. Computer Methods for the Range of Functions. Ellis Horwood: Chichester, 1984.
36. Alefeld G. Interval arithmetic tools for range approximation and inclusion of zeros. Error Control and Adaptivity in Scientific Computing, Bulgak H, Zenger C (eds.). Kluwer Academic: Dordrecht, 1999; 1-21.
37. Bik AJC, Wijshoff HAG. Iteration space partitioning. Future Generation Computer Systems 1997; 12:421-429.
38. Haghighat MR, Polychronopoulos CD. Symbolic analysis: A basis for parallelization, optimization and scheduling of programs. Proceedings of the 1993 Workshop on Languages and Compilers for Parallel Computing, Portland, OR, 1993 (Lecture Notes in Computer Science, vol. 768). Springer: Berlin, 1993; 567-585.
39. Texas Instruments. TMS320C54x Reference Set, Literature Number: SPRU172C. Texas Instruments: Dallas, TX, 2001.