A physical analysis of HV MOSFET capacitance behaviour

IEEE International Symposium on Industrial Electronics

Volumn II, Issue , 2005, Pages 473-477

  Anghel, C ^a   Chauhan, Y S ^a   Hefyene, N ^a   Ionescu, A M ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CIRCUIT THEORY; COMPUTER AIDED DESIGN; ELECTRIC VARIABLES CONTROL; GATES (TRANSISTOR);

GATE VOLTAGE; LDMOS TRANSISTORS; TCAD SIMULATIONS;

MOSFET DEVICES;

EID: 33748356476     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISIE.2005.1528963     Document Type: Conference Paper

References (5)

1. C.H. Kreuzer, N. Krischke, P. Nance, "Physically Based Description of Quasi-Saturation Region of Vertical DMOS Power Transistors", Proceedings of International Electron Devices Meeting, 1996, pp. 489-492.
2. J. Evans, G. Amaratunga, "The Behavior of Very High Current Density Power MOSFETs", IEEE Trans. on Electron Devices, Vol. 44, No. 7, pp.1148-1153, 1997.
3. Chung-Mon Liu;, J.B. Kuo, "Quasi-saturation capacitance behavior of a DMOS device", IEEE Trans. on Electron Devices, Vol. 44, No. 7, pp. 1117-1123, 1997
4. R.F. Pierret, "Semiconductor Device Fundamentals", Addison Wesley, 1996.
5. Y. Tsividis, "Operation and Modeling of the MOS Transistor", McGraw-Hill, pp. 280-281, Second edition 1999.