Hermite polynomial based interconnect analysis in the presence of process variations

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 10, 2006, Pages 2001-2010

  Vrudhula, Sarma ^a,b   Wang, Janet Meiling ^a,c   Ghanta, Praveen ^a,b  

^a IEEE   (United States)

^b Arizona State University   (United States)

^c University of Arizona   (United States)

Author keywords

Galerkin projection; Hilbert space; Interconnects; Process variations; Stochastic finite elements; Very largescale integration (VLSI)

Indexed keywords

GALERKIN PROJECTION; HILBERT SPACE; INTERCONNECTS; PROCESS VARIATIONS; STOCHASTIC FINITE ELEMENTS; VERY LARGESCALE INTEGRATION (VLSI);

CAPACITANCE; COMPUTATIONAL GEOMETRY; FINITE ELEMENT METHOD; GALERKIN METHODS; MATHEMATICAL MODELS; NANOTECHNOLOGY; STOCHASTIC CONTROL SYSTEMS; VLSI CIRCUITS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 33748310757     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.862734     Document Type: Article

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