Issues and approaches to coarse-grain reconfigurable architecture development

IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings

Volumn 2003-January, Issue , 2003, Pages 111-120

  Eguro, K ^a   Hauck, S ^a  

^a University of Washington   (United States)

Author keywords

Cryptography; Field programmable gate arrays; Hardware; Logic design; Logic devices; Optimized production technology; Programmable logic arrays; Reconfigurable architectures; Reconfigurable logic; Routing

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER HARDWARE; COMPUTERS; CRYPTOGRAPHY; HARDWARE; LOGIC DESIGN; LOGIC DEVICES; LOGIC GATES; PROBLEM SOLVING; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE;

COARSE-GRAIN FUNCTIONAL UNITS; COARSE-GRAIN RECONFIGURABLE ARCHITECTURES; FPGA ARCHITECTURES; OPTIMIZED PRODUCTION TECHNOLOGY; PROGRAMMABLE LOGIC ARRAY; RECONFIGURABLE DEVICES; RECONFIGURABLE LOGIC; ROUTING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33746927031     PISSN: 10823409     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPGA.2003.1227247     Document Type: Conference Paper

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