-
1
-
-
0004038844
-
-
Kluwer, Norwell, MA
-
Cappelletti P., Golla C., Olivo P., and Zanoni E. Flash Memories (1999), Kluwer, Norwell, MA
-
(1999)
Flash Memories
-
-
Cappelletti, P.1
Golla, C.2
Olivo, P.3
Zanoni, E.4
-
2
-
-
0016961262
-
On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique
-
Dickson J.F. On-chip high-voltage generation in NMOS integrated circuits using an improved voltage multiplier technique. IEEE J. Solid-State Circuits SC-11 3 (1976) 374
-
(1976)
IEEE J. Solid-State Circuits
, vol.SC-11
, Issue.3
, pp. 374
-
-
Dickson, J.F.1
-
3
-
-
0031210141
-
A dynamic analysis of the Dikson charge pump
-
Tanzawa T. A dynamic analysis of the Dikson charge pump. IEEE J. Solid-State Circuits 32 8 (1997) 1231-1240
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, Issue.8
, pp. 1231-1240
-
-
Tanzawa, T.1
-
4
-
-
0026953337
-
A 5-V-only operation 0.6-μm flash EEPROM with row decoder scheme in triple-well structure
-
Umezawa A., Atzumi S., Kuriyama M., Banba H., Imamiya K., Naruke K., Yamada S., Obi E., Oshikiri M., Suzuki T., and Tanaka S. A 5-V-only operation 0.6-μm flash EEPROM with row decoder scheme in triple-well structure. IEEE J. Solid-State Circuits 27 11 (1992) 1540-1546
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, Issue.11
, pp. 1540-1546
-
-
Umezawa, A.1
Atzumi, S.2
Kuriyama, M.3
Banba, H.4
Imamiya, K.5
Naruke, K.6
Yamada, S.7
Obi, E.8
Oshikiri, M.9
Suzuki, T.10
Tanaka, S.11
-
5
-
-
0033221852
-
2, 1.8-V-only. 16-Mb DINOR flash memory with gate-protected-ploy-diode (GPPD) charge pump
-
2, 1.8-V-only. 16-Mb DINOR flash memory with gate-protected-ploy-diode (GPPD) charge pump. IEEE J. Solid State Circuits 34 11 (1999) 1551-1556
-
(1999)
IEEE J. Solid State Circuits
, vol.34
, Issue.11
, pp. 1551-1556
-
-
Miyawaki, Y.1
-
6
-
-
0026953337
-
A 5v-only operation 0.6-μm flash EEPROM with row decoder scheme in triple-well technology
-
Umezawa A., et al. A 5v-only operation 0.6-μm flash EEPROM with row decoder scheme in triple-well technology. IEEE J. Solid-State Circuits SC27 11 (1982) 1540-1546
-
(1982)
IEEE J. Solid-State Circuits
, vol.SC27
, Issue.11
, pp. 1540-1546
-
-
Umezawa, A.1
-
7
-
-
0001050518
-
MOS charge pumps for low-voltage operation
-
Wu J., and Chang K. MOS charge pumps for low-voltage operation. IEEE J. Solid-State Circuits 33 (1998) 592-597
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, pp. 592-597
-
-
Wu, J.1
Chang, K.2
-
8
-
-
0024753848
-
Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits
-
Witters J.S., Groeseneken G., and Maes H.E. Analysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits. IEEE J. Solid-State Circuits 24 5 (1989) 1372-1380
-
(1989)
IEEE J. Solid-State Circuits
, vol.24
, Issue.5
, pp. 1372-1380
-
-
Witters, J.S.1
Groeseneken, G.2
Maes, H.E.3
-
9
-
-
0034849198
-
-
Hongchin Lin, Nai-Hsien Chen, An efficient clock scheme for low-voltage four-phase charge pumps, Proceedings of Technical Papers International Symposium on VLSI Technology, Systems, and Applications, 2001, pp. 228-231.
-
-
-
-
12
-
-
0038718671
-
Power efficient charge pump in deep submicron standard CMOS technology
-
Pelliconi R., Iezzi D., Baroni A., Pasotti M., and Rolandi P.L. Power efficient charge pump in deep submicron standard CMOS technology. IEEE J. Solid-State Circuits 38 6 (2003) 1068-1071
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.6
, pp. 1068-1071
-
-
Pelliconi, R.1
Iezzi, D.2
Baroni, A.3
Pasotti, M.4
Rolandi, P.L.5
-
14
-
-
0031166547
-
Efficiency improvement in charge-pump circuits
-
Wang C., and Wu J. Efficiency improvement in charge-pump circuits. IEEE J. Solid-State Circuits 32 (1997) 852-860
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, pp. 852-860
-
-
Wang, C.1
Wu, J.2
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