-
1
-
-
0000087207
-
The semantics of a simple language for parallel programming
-
G. Kahn, "The semantics of a simple language for parallel programming," in Inform. Process. 74: Proc. IFIP Congr. 74, 1974, pp. 471-475.
-
(1974)
Inform. Process. 74: Proc. IFIP Congr. 74
, pp. 471-475
-
-
Kahn, G.1
-
3
-
-
0024645936
-
Petri nets: Properties, analysis, and applications
-
Apr.
-
T. Murata, "Petri nets: properties, analysis, and applications," Proc. IEEE, vol. 77, no. 4, pp. 541-580, Apr. 1989.
-
(1989)
Proc. IEEE
, vol.77
, Issue.4
, pp. 541-580
-
-
Murata, T.1
-
4
-
-
0003496051
-
-
Ph.D. dissertation, Univ. California, Berkeley, CA, available as UCB/ERL M93/69
-
J. T. Buck, "Scheduling dynamic dataflow graphs with bounded memory using the token flow model," Ph.D. dissertation, Univ. California, Berkeley, CA, 1993, available as UCB/ERL M93/69.
-
(1993)
Scheduling Dynamic Dataflow Graphs with Bounded Memory Using the Token Flow Model
-
-
Buck, J.T.1
-
5
-
-
0003570574
-
-
Ph.D. dissertation, Univ. California, Berkeley, CA, available as UCB/ERL M95/105
-
T. M. Parks, "Bounded scheduling of process networks" Ph.D. dissertation, Univ. California, Berkeley, CA, 1995, available as UCB/ERL M95/105.
-
(1995)
Bounded Scheduling of Process Networks
-
-
Parks, T.M.1
-
6
-
-
0003931061
-
A structural approach to operational semantics
-
Aarhus Univ., Åarhus, Denmark
-
G. D. Plotkin, A structural approach to operational semantics Aarhus Univ., Åarhus, Denmark, Tech. Rep. DAIMIFN-19, 1981.
-
(1981)
Tech. Rep.
, vol.DAIMIFN-19
-
-
Plotkin, G.D.1
-
7
-
-
0026953373
-
The Esterel synchronous programming language: Design, semantics, implementation
-
Nov.
-
G. Berry and G. Gonthier, "The Esterel synchronous programming language: Design, semantics, implementation," Sci. Comput. Program., vol. 19, no. 2, pp. 87-152, Nov. 1992.
-
(1992)
Sci. Comput. Program.
, vol.19
, Issue.2
, pp. 87-152
-
-
Berry, G.1
Gonthier, G.2
-
8
-
-
85022163068
-
LUSTRE: A declarative language for programming synchronous systems
-
P. Caspi, D. Pilaud, N. Halbwachs, and J. A. Plaice, "LUSTRE: a declarative language for programming synchronous systems," in Proc. ACM Symp. Principles Program. Lang. (POPL), 1987, pp. 178-188.
-
(1987)
Proc. ACM Symp. Principles Program. Lang. (POPL)
, pp. 178-188
-
-
Caspi, P.1
Pilaud, D.2
Halbwachs, N.3
Plaice, J.A.4
-
9
-
-
0034297992
-
An implementation of constructive synchronous programs in POLIS
-
Oct.
-
G. Berry and E. Sentovich, "An implementation of constructive synchronous programs in POLIS," Formal Methods Syst. Des., vol. 17, no. 2, pp. 165-191, Oct. 2000.
-
(2000)
Formal Methods Syst. Des.
, vol.17
, Issue.2
, pp. 165-191
-
-
Berry, G.1
Sentovich, E.2
-
10
-
-
4544268390
-
Generating fast code from concurrent program dependence graphs
-
J. Zeng, C. Soviani, and S. A. Edwards, "Generating fast code from concurrent program dependence graphs," in Proc. Lang., Compilers, Tools for Embedded Syst. (LCTES), 2004, pp. 175-181.
-
(2004)
Proc. Lang., Compilers, Tools for Embedded Syst. (LCTES)
, pp. 175-181
-
-
Zeng, J.1
Soviani, C.2
Edwards, S.A.3
-
11
-
-
84939698077
-
Synchronous data flow
-
Sept.
-
E. A. Lee and D. G. Messerschmitt, "Synchronous data flow," Proc. IEEE, vol. 75, no. 9, pp. 1235-1245, Sept. 1987.
-
(1987)
Proc. IEEE
, vol.75
, Issue.9
, pp. 1235-1245
-
-
Lee, E.A.1
Messerschmitt, D.G.2
-
12
-
-
84893782961
-
Efficient compilation of process-based concurrent programs without run-time scheduling
-
B. Lin, "Efficient compilation of process-based concurrent programs without run-time scheduling," in Proc. Des. Autom. Test Eur. (DATE), 1998, pp. 211-217.
-
(1998)
Proc. Des. Autom. Test Eur. (DATE)
, pp. 211-217
-
-
Lin, B.1
-
13
-
-
0033300726
-
Compositional software synthesis of communicating processes
-
X. Zhu and B. Lin, "Compositional software synthesis of communicating processes," in Proc. IEEE Int. Conf. Comput. Des. (ICCD), 1999, pp. 646-651.
-
(1999)
Proc. IEEE Int. Conf. Comput. Des. (ICCD)
, pp. 646-651
-
-
Zhu, X.1
Lin, B.2
-
14
-
-
0033700097
-
Task generation and compile-time scheduling for mixed data-control embedded software
-
J. Cortadella, A. Kondratyev, L. Lavagno, M. Massot, S. Moral, C. Passerone, Y. Watanabe, and A. Sangiovanni-Vincentelli, 'Task generation and compile-time scheduling for mixed data-control embedded software," in Proc. 37th Des. Autom. Conf., 2000, pp. 489-494.
-
(2000)
Proc. 37th Des. Autom. Conf.
, pp. 489-494
-
-
Cortadella, J.1
Kondratyev, A.2
Lavagno, L.3
Massot, M.4
Moral, S.5
Passerone, C.6
Watanabe, Y.7
Sangiovanni-Vincentelli, A.8
-
15
-
-
0034269436
-
Software synthesis and code generation for signal processing systems
-
Sep.
-
S. S. Bhattacharyya, R. Leupers, and P. Marwedel, "Software synthesis and code generation for signal processing systems," IEEE Trans. Circuits Syst.- II: Analog Dig. Signal Proces., vol. 47, no. 9, pp. 849-875, Sep. 2000.
-
(2000)
IEEE Trans. Circuits Syst.- II: Analog Dig. Signal Proces.
, vol.47
, Issue.9
, pp. 849-875
-
-
Bhattacharyya, S.S.1
Leupers, R.2
Marwedel, P.3
-
16
-
-
0030704440
-
An efficient implementation of reactivity for modeling hardware in the Scenic design environment
-
S. Liao, S. Tjiang, and R. Gupta, "An efficient implementation of reactivity for modeling hardware in the Scenic design environment," in Proc. 34th Des. Autom. Conf., 1997, pp. 70-75.
-
(1997)
Proc. 34th Des. Autom. Conf.
, pp. 70-75
-
-
Liao, S.1
Tjiang, S.2
Gupta, R.3
-
17
-
-
0001799346
-
Esterel on hardware
-
Apr.
-
G. Berry, "Esterel on hardware," Philosophical Trans. Roy. Soc. London, ser. A, vol. 339, no. 1652, pp. 87-103, Apr. 1992.
-
(1992)
Philosophical Trans. Roy. Soc. London, Ser. A
, vol.339
, Issue.1652
, pp. 87-103
-
-
Berry, G.1
-
18
-
-
0026243790
-
Efficiently computing static single assignment form and the control dependence graph
-
Oct.
-
R. Cytron, J. Ferrante, B. K. Rosen, M. N. Wegman, and F. K. Zadeck, "Efficiently computing static single assignment form and the control dependence graph," ACM Trans. Program. Lang. Syst., vol. 13, no. 4, pp. 451-490, Oct. 1991.
-
(1991)
ACM Trans. Program. Lang. Syst.
, vol.13
, Issue.4
, pp. 451-490
-
-
Cytron, R.1
Ferrante, J.2
Rosen, B.K.3
Wegman, M.N.4
Zadeck, F.K.5
-
19
-
-
0035720870
-
Using a hardware model checker to verify software
-
S. A. Edwards, T. Ma, and R. Damiano, "Using a hardware model checker to verify software," in Proc. 4th Int. Conf. ASIC (ASICON), 2001, pp. 85-90.
-
(2001)
Proc. 4th Int. Conf. ASIC (ASICON)
, pp. 85-90
-
-
Edwards, S.A.1
Ma, T.2
Damiano, R.3
-
20
-
-
0003762771
-
Properties of a model for parallel computations: Determinacy, termination, and queueing
-
Nov.
-
R. M. Karp and R. E. Miller, "Properties of a model for parallel computations: determinacy, termination, and queueing,"SIAM J. Appl. Math., vol. 14, no. 6, pp. 1390-1411, Nov. 1966.
-
(1966)
SIAM J. Appl. Math.
, vol.14
, Issue.6
, pp. 1390-1411
-
-
Karp, R.M.1
Miller, R.E.2
-
21
-
-
0023138886
-
Static scheduling of synchronous data flow programs for digital signal processing
-
Jan.
-
E. A. Lee and D. G. Messerschmitt, "Static scheduling of synchronous data flow programs for digital signal processing," IEEE Trans. Computers, vol. C-36, no. 1, pp. 24-35, Jan. 1987.
-
(1987)
IEEE Trans. Computers
, vol.C-36
, Issue.1
, pp. 24-35
-
-
Lee, E.A.1
Messerschmitt, D.G.2
-
23
-
-
29244455084
-
Simulation and analysis of synthesised asynchronous circuits
-
Sep.
-
L. Janin, A. Bardsley, and D. A. Edwards, "Simulation and analysis of synthesised asynchronous circuits," Int. J. Simulation Syst., Sci. Technol., vol. 4, no. 3-4, pp. 31-43, Sep. 2003.
-
(2003)
Int. J. Simulation Syst., Sci. Technol.
, vol.4
, Issue.3-4
, pp. 31-43
-
-
Janin, L.1
Bardsley, A.2
Edwards, D.A.3
-
24
-
-
0026818736
-
Receptive process theory
-
Feb.
-
M. B. Josephs, "Receptive process theory," Acta Informatica, vol. 29, no. 1, pp. 17-31, Feb. 1992.
-
(1992)
Acta Informatica
, vol.29
, Issue.1
, pp. 17-31
-
-
Josephs, M.B.1
-
25
-
-
77957933195
-
An analysis of determinacy using a trace-theoretic model of asynchronous circuits
-
_, "An analysis of determinacy using a trace-theoretic model of asynchronous circuits," in Proc. Ninth Int. Symp. Asynchronous Circuits Syst. (ASYNC), 2003, pp. 121-130.
-
(2003)
Proc. Ninth Int. Symp. Asynchronous Circuits Syst. (ASYNC)
, pp. 121-130
-
-
-
27
-
-
0003733188
-
-
Boston, Massachusetts: Kluwer
-
F. Balarin, P. Giusto, A. Jurecska, C. Passerone, E. Sentovich, B. Tabbara, M. Chiodo, H. Hsieh, L. Lavagno, A. Sangiovanni-Vincentelli, and K. Suzuki, Hardware-Software Co-Design of Embedded Systems: The POLIS Approach. Boston, Massachusetts: Kluwer, 1997.
-
(1997)
Hardware-software Co-design of Embedded Systems: The POLIS Approach
-
-
Balarin, F.1
Giusto, P.2
Jurecska, A.3
Passerone, C.4
Sentovich, E.5
Tabbara, B.6
Chiodo, M.7
Hsieh, H.8
Lavagno, L.9
Sangiovanni-Vincentelli, A.10
Suzuki, K.11
-
28
-
-
0037622735
-
A formal specification model for hardware/software codesign
-
[Online]
-
M. Chiodo, P. Giusto, A. Jurecska, L. Lavagno, H. Hsieh, and A. Sangiovanni-Vincentelli, "A formal specification model for hardware/software codesign," in Proc. Int. Workshop Hardw.-Softw. Codesign, (1993) [Online], Available: http://www-cad.eecs.berkeley.edu/Respep/Research/ hsc/abstract.html
-
(1993)
Proc. Int. Workshop Hardw.-softw. Codesign
-
-
Chiodo, M.1
Giusto, P.2
Jurecska, A.3
Lavagno, L.4
Hsieh, H.5
Sangiovanni- Vincentelli, A.6
-
29
-
-
33646800850
-
The synchronous languages 12 years later
-
Jan.
-
A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. L. Guernic, and R. de Simone, "The synchronous languages 12 years later," Proc. IEEE, vol. 91, no. 1, pp. 64-83, Jan. 2003.
-
(2003)
Proc. IEEE
, vol.91
, Issue.1
, pp. 64-83
-
-
Benveniste, A.1
Caspi, P.2
Edwards, S.A.3
Halbwachs, N.4
Guernic, P.L.5
De Simone, R.6
-
30
-
-
0026222682
-
Programming real-time applications with SIGNAL
-
Sept.
-
P. Le Guernic, T. Gautier, M. Le Borgne, and C. Le Maire, "Programming real-time applications with SIGNAL," Proc. IEEE, vol. 79, no. 9, pp. 1321-1336, Sept. 1991.
-
(1991)
Proc. IEEE
, vol.79
, Issue.9
, pp. 1321-1336
-
-
Le Guernic, P.1
Gautier, T.2
Le Borgne, M.3
Le Maire, C.4
-
31
-
-
0001325987
-
Ptolemy: A framework for simulating and prototyping heterogeneous systems
-
Apr.
-
J. T. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, "Ptolemy: A framework for simulating and prototyping heterogeneous systems," Int. J. Comput. Simulation vol. 4, pp. 155-182, Apr. 1994.
-
(1994)
Int. J. Comput. Simulation
, vol.4
, pp. 155-182
-
-
Buck, J.T.1
Ha, S.2
Lee, E.A.3
Messerschmitt, D.G.4
-
32
-
-
0344951184
-
Metropolis: An integrated electronic system design environment
-
Apr.
-
F. Balarin, Y. Watanabe, H. Hsieh, L. Lavagno, C. Passerone, and A. Sangiovanni-Vincentelli, "Metropolis: An integrated electronic system design environment," IEEE Computer, vol. 36, no. 4, pp. 45-52, Apr. 2003.
-
(2003)
IEEE Computer
, vol.36
, Issue.4
, pp. 45-52
-
-
Balarin, F.1
Watanabe, Y.2
Hsieh, H.3
Lavagno, L.4
Passerone, C.5
Sangiovanni-Vincentelli, A.6
-
34
-
-
0242527741
-
Giotto: A time-triggered language for embedded programming
-
Jan.
-
T. A. Henzinger, B. Horowitz, and C. M. Kirsch, "Giotto: a time-triggered language for embedded programming," Proc. IEEE, vol. 91, no. 1, pp. 84-99, Jan. 2003.
-
(2003)
Proc. IEEE
, vol.91
, Issue.1
, pp. 84-99
-
-
Henzinger, T.A.1
Horowitz, B.2
Kirsch, C.M.3
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