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Volumn 153, Issue 3, 2006, Pages 269-273

Modelling charge injection in MOS analogue switches using a compact model in a deep submicron technology

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CHARGE; ELECTRIC CONDUCTIVITY; ENERGY CONSERVATION; TRANSISTORS;

EID: 33745304982     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:20045088     Document Type: Article
Times cited : (7)

References (16)
  • 1
    • 0025384018 scopus 로고
    • On charge injection in analog MOS switches and dummy switch compensation techniques
    • Eichenberger, C., and Guggenbhul, W.: ' On charge injection in analog MOS switches and dummy switch compensation techniques ', IEEE Trans. Circuits Syst., 1990, CAS-37, (2), p. 256-264
    • (1990) IEEE Trans. Circuits Syst. , vol.CAS-37 , Issue.2 , pp. 256-264
    • Eichenberger, C.1    Guggenbhul, W.2
  • 2
    • 0026138527 scopus 로고
    • A high-speed sample-and-hold technique using a miller hold capacitance
    • Lim, P.J., and Wooley, B.A.: ' A high-speed sample-and-hold technique using a miller hold capacitance ', IEEE J. Solid-State Circuits, 1991, 26, (4), p. 643-651
    • (1991) IEEE J. Solid-State Circuits , vol.26 , Issue.4 , pp. 643-651
    • Lim, P.J.1    Wooley, B.A.2
  • 3
    • 0000076149 scopus 로고
    • A switching scheme for switched capacitor filters which reduces the effect of parasitic capacitances associated with switch control terminals
    • Haigh, D.G., and Singh, B.: ' A switching scheme for switched capacitor filters which reduces the effect of parasitic capacitances associated with switch control terminals ', Proc. IEEE Int. Symp. on Circuits and Systems, 1983, p. 586-589
    • (1983) Proc. IEEE Int. Symp. on Circuits and Systems , pp. 586-589
    • Haigh, D.G.1    Singh, B.2
  • 4
    • 0023292124 scopus 로고
    • Modelling charge injection in MOS analog switches
    • Sheu, B.J., Shieh, J.H., and Patil, M.: ' Modelling charge injection in MOS analog switches ', IEEE Trans. Circuits Syst., 1987, CAS-34, (2), p. 214-216
    • (1987) IEEE Trans. Circuits Syst. , vol.CAS-34 , Issue.2 , pp. 214-216
    • Sheu, B.J.1    Shieh, J.H.2    Patil, M.3
  • 5
    • 0021477881 scopus 로고
    • Switched-induced error voltage on a switched capacitor
    • Sheu, B.J., and Hu, C.: ' Switched-induced error voltage on a switched capacitor ', IEEE J. Solid-State Circuits, 1984, SC-19, p. 519-525
    • (1984) IEEE J. Solid-State Circuits , vol.SC-19 , pp. 519-525
    • Sheu, B.J.1    Hu, C.2
  • 6
  • 8
    • 0030083149 scopus 로고    scopus 로고
    • A new quantitative model for weak inversion charge injection in MOSFET analog switches
    • Gu, Y.-B., and Chen, M.-J.: ' A new quantitative model for weak inversion charge injection in MOSFET analog switches ', IEEE Trans. Electron Devices, 1996, 43, (2), p. 295-302
    • (1996) IEEE Trans. Electron Devices , vol.43 , Issue.2 , pp. 295-302
    • Gu, Y.-B.1    Chen, M.-J.2
  • 11
    • 0029342165 scopus 로고
    • An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
    • Enz, C.C., Krummenacher, F., and Vittoz, E.A.: ' An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications ', Analog Integr. Circuits Signal Process., 1995, 8, p. 83-114
    • (1995) Analog Integr. Circuits Signal Process. , vol.8 , pp. 83-114
    • Enz, C.C.1    Krummenacher, F.2    Vittoz, E.A.3
  • 12
    • 0033357510 scopus 로고    scopus 로고
    • Perspectives on analytical modelling of small geometry MOSFETs in SPICE for low voltage/low power CMOS circuit design
    • Foty, D.: ' Perspectives on analytical modelling of small geometry MOSFETs in SPICE for low voltage/low power CMOS circuit design ', Analog Integr. Circuits Signal Process., 1999, 21, p. 229-252
    • (1999) Analog Integr. Circuits Signal Process. , vol.21 , pp. 229-252
    • Foty, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.