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Volumn 23, Issue 3, 2006, Pages 212-219

Packaging a 40-Gbps serial link using a wire-bonded plastic ball grid array

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; PRODUCT DESIGN; THREE DIMENSIONAL;

EID: 33744524127     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2006.78     Document Type: Article
Times cited : (21)

References (10)
  • 2
    • 4544293938 scopus 로고    scopus 로고
    • "Future Microprocessors and Off-Chip SOP Interconnect"
    • H. Hofstee, "Future Microprocessors and Off-Chip SOP Interconnect," IEEE Trans. Advanced Packaging, vol. 27, no. 2, 2004, pp. 301-303.
    • (2004) IEEE Trans. Advanced Packaging , vol.27 , Issue.2 , pp. 301-303
    • Hofstee, H.1
  • 3
    • 0030400848 scopus 로고    scopus 로고
    • "A 0.8-μm CMOS 2.5-Gbps Oversampling Receiver and Transmitter for Serial Links"
    • C. Yang and M. Horowitz, "A 0.8-μm CMOS 2.5-Gbps Oversampling Receiver and Transmitter for Serial Links," IEEE J. Solid-State Circuits, vol. 31, no. 12, 1996, pp. 2015-2023.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , Issue.12 , pp. 2015-2023
    • Yang, C.1    Horowitz, M.2
  • 4
    • 28144448848 scopus 로고    scopus 로고
    • "Circuit Techniques for a 40-Gbps Transmitter in 0.13-μm CMOS"
    • J. Kim et al., "Circuit Techniques for a 40-Gbps Transmitter in 0.13-μm CMOS," Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 05), 2005, pp. 150-151.
    • (2005) Proc. IEEE Int'l Solid-State Circuits Conf. (ISSCC 05) , pp. 150-151
    • Kim, J.1
  • 6
    • 33744526758 scopus 로고    scopus 로고
    • "Electrical Design for High Data Rate Signals in Conventional, BT-Based PBGA Substrates Using Wire Bonded Interconnection"
    • IEEE Press
    • R. Emigh, "Electrical Design for High Data Rate Signals in Conventional, BT-Based PBGA Substrates Using Wire Bonded Interconnection," Proc. IEEE Electronics Packaging Technology Conf. (EPTC 03), IEEE Press, 2003, pp. 517-522.
    • (2003) Proc. IEEE Electronics Packaging Technology Conf. (EPTC 03) , pp. 517-522
    • Emigh, R.1
  • 7
    • 0036589341 scopus 로고    scopus 로고
    • "Simulation and Design Methodology for a 50-Gbps Multiplexer/Demultiplexer Package"
    • L. Shan et al., "Simulation and Design Methodology for a 50-Gbps Multiplexer/Demultiplexer Package," IEEE Trans. Advanced Packaging, vol. 25, no. 2, 2002, pp. 248-254.
    • (2002) IEEE Trans. Advanced Packaging , vol.25 , Issue.2 , pp. 248-254
    • Shan, L.1
  • 9
    • 9244224671 scopus 로고    scopus 로고
    • "Twisted Differential Line Structure on High-Speed Printed Circuit Boards to Reduce Crosstalk and Radiated Emission"
    • D. Kam et al., "Twisted Differential Line Structure on High-Speed Printed Circuit Boards to Reduce Crosstalk and Radiated Emission," IEEE Trans. Advanced Packaging, vol. 27, no. 4, 2004, pp. 590-596.
    • (2004) IEEE Trans. Advanced Packaging , vol.27 , Issue.4 , pp. 590-596
    • Kam, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.