ReCoNet: Modeling and implementation of fault tolerant distributed reconfigurable hardware

Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003

Volumn , Issue , 2003, Pages 343-348

  Haubelt, C ^a   Koch, D ^a   Teich, J ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

Automotive engineering; Body area networks; Computer science; Delay; Energy consumption; Fault tolerance; Field programmable gate arrays; Hardware; Operating systems; Prototypes

Indexed keywords

AUTOMOTIVE ENGINEERING; COMPUTER OPERATING SYSTEMS; COMPUTER SCIENCE; DELAY TOLERANT NETWORKS; ENERGY UTILIZATION; FAULT TOLERANCE; FAULT TOLERANT COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTEGRATED CIRCUITS; NETWORKS (CIRCUITS); RECONFIGURABLE HARDWARE; SYSTEMS ANALYSIS;

BODY AREA NETWORK; DELAY; FAULT-TOLERANT; MANAGEMENT FUNCTIONS; PROTOTYPE IMPLEMENTATIONS; PROTOTYPES; RECENT RESEARCHES; RECONFIGURABLE CHIPS;

COMPUTER HARDWARE;

EID: 33646931958     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232851     Document Type: Conference Paper

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