An FPGA implementation of discrete Hartley transforms

Proceedings - 7th International Symposium on Signal Processing and Its Applications, ISSPA 2003

Volumn 1, Issue , 2003, Pages 625-628

  Amira, A ^a   Bouridane, A ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

TREES (MATHEMATICS);

BETTER PERFORMANCE; DISCRETE HARTLEY TRANSFORMS; DISTRIBUTED ARITHMETIC; DISTRIBUTED ARITHMETIC DESIGN; FPGA IMPLEMENTATIONS; NOVEL ARCHITECTURE; SYSTOLIC ARCHITECTURE; XILINX FPGA;

FILTER BANKS;

EID: 33646586460     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSPA.2003.1224781     Document Type: Conference Paper

References (12)

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