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Volumn 3725 LNCS, Issue , 2005, Pages 5-19

Wired: Wire-aware circuit design

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT FUNCTION; ROUTING WIRES; STOPPERS;

EID: 33646421634     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11560548_4     Document Type: Conference Paper
Times cited : (17)

References (12)
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    • 0031190775 scopus 로고    scopus 로고
    • The DUAL-EVAL hardware description language and its use in the formal specification and verification of the FM9001 microprocessor
    • B. Brock and W.A. Hunt Jr. The DUAL-EVAL Hardware Description Language and Its Use in the Formal Specification and Verification of the FM9001 Microprocessor. Formal Methods in System Design, 11(1), 1997.
    • (1997) Formal Methods in System Design , vol.11 , Issue.1
    • Brock, B.1    Hunt Jr., W.A.2
  • 4
    • 84947206106 scopus 로고    scopus 로고
    • The design and verification of a sorter core
    • CHARME. Springer
    • K. Claessen, M. Sheeran, and S. Singh. The Design and Verification of a Sorter Core. In CHARME, volume 2144 of LNCS. Springer, 2001.
    • (2001) LNCS , vol.2144
    • Claessen, K.1    Sheeran, M.2    Singh, S.3
  • 5
    • 0034444495 scopus 로고    scopus 로고
    • Effect of wire delay on the design of prefix adders in deep-submicron technology
    • IEEE
    • Z. Huang and M. Ercegovac. Effect of Wire Delay on the Design of Prefix Adders in Deep-Submicron Technology. In Proc. 34th Asilomar Conf. IEEE, 2000.
    • (2000) Proc. 34th Asilomar Conf.
    • Huang, Z.1    Ercegovac, M.2
  • 6
    • 0001933470 scopus 로고
    • Circuit design in Ruby
    • J. Staunstrup, editor. North-Holland
    • G. Jones and M. Sheeran. Circuit design in Ruby. In J. Staunstrup, editor, Formal Methods for VLSI Design. North-Holland, 1990.
    • (1990) Formal Methods for VLSI Design
    • Jones, G.1    Sheeran, M.2
  • 9
    • 24944472073 scopus 로고    scopus 로고
    • Generating fast multipliers using clever circuits
    • Formal Methods in Computer-Aided Design (FMCAD). Springer
    • M. Sheeran. Generating fast multipliers using clever circuits. In Formal Methods in Computer-Aided Design (FMCAD), volume 3312 of LNCS. Springer, 2004.
    • (2004) LNCS , vol.3312
    • Sheeran, M.1
  • 12
    • 24944436995 scopus 로고    scopus 로고
    • Opportunities and challenges in building silicon products at 65nm and beyond
    • IEEE
    • G. Spirakis. Opportunities and challenges in building silicon products at 65nm and beyond. In Design and Test in Europe (DATE). IEEE, 2004.
    • (2004) Design and Test in Europe (DATE)
    • Spirakis, G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.