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Volumn 11, Issue 1, 1997, Pages 71-104

The DUAL-EVAL Hardware Description Language and Its Use in the Formal Specification and Verification of the FM9001 Microprocessor

Author keywords

DUAL EVAL; FM9001; Hardware Description Languages; Hardware Verification; Microprocessors

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; MICROPROCESSOR CHIPS; SIMULATORS;

EID: 0031190775     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1008685826293     Document Type: Article
Times cited : (25)

References (44)
  • 1
    • 0004996778 scopus 로고
    • Testing the FM9001 Microprocessor
    • Computational Logic, Inc., 1717 W. Sixth St., Suite 290, Austin, Texas 78703
    • Kenneth L. Albin, Bishop C. Brock, Warren A. Hunt, Jr., and Lawrence M. Smith. Testing the FM9001 Microprocessor. Technical Report 90, Computational Logic, Inc., 1717 W. Sixth St., Suite 290, Austin, Texas 78703, 1994.
    • (1994) Technical Report 90
    • Albin, K.L.1    Brock, B.C.2    Hunt Jr., W.A.3    Smith, L.M.4
  • 6
    • 0004245144 scopus 로고
    • Academic Press, Boston, For prover sources, documentation of the logic, and examples, ftp://ftp.cs.utexas.edu/pub/boyer/nqthm-1992.tar.Z
    • R.S. Boyer and J S. Moore, A Computational Logic Handbook. Academic Press, Boston, 1988. For prover sources, documentation of the logic, and examples, see ftp://ftp.cli.com/pub/nqthm/nqthm-1992/nqthm-1992.tar.Z or ftp://ftp.cs.utexas.edu/pub/boyer/nqthm-1992.tar.Z.
    • (1988) A Computational Logic Handbook
    • Boyer, R.S.1    Moore, J.S.2
  • 7
    • 2342588462 scopus 로고
    • Transforming Functional Hardware Models into Structural Models
    • Computational Logic, Inc., July
    • Bishop Brock. Transforming Functional Hardware Models into Structural Models. Internal Note 150, Computational Logic, Inc., July 1989.
    • (1989) Internal Note 150
    • Brock, B.1
  • 9
    • 2342450306 scopus 로고
    • Introduction to a Formally Defined Hardware Description Language
    • V. Stavridou, T. Melham, and R. Boute, eds., North-Holland
    • Bishop C. Brock, Warren A. Hunt, Jr., and William D. Young., "Introduction to a Formally Defined Hardware Description Language," Theorem Provers in Circuit Design, V. Stavridou, T. Melham, and R. Boute, eds., North-Holland, pp. 3-35, 1992.
    • (1992) Theorem Provers in Circuit Design , pp. 3-35
    • Brock, B.C.1    Hunt Jr., W.A.2    Young, W.D.3
  • 10
    • 0141667730 scopus 로고
    • The FM9001 Microprocessor Proof
    • Computational Logic, December
    • Bishop C. Brock, Warren A. Hunt, Jr., and Matt Kaufmann. The FM9001 Microprocessor Proof. Technical Report 86, Computational Logic, December, 1994.
    • (1994) Technical Report 86
    • Brock, B.C.1    Hunt Jr., W.A.2    Kaufmann, M.3
  • 11
    • 84914976812 scopus 로고
    • From Programs to Transistors: Verifying Hardware Synthesis Tools
    • Workshop on Hardware Specification, Verification and Synthesis: Mathematical Aspects., Springer Verlag
    • Geoffrey M. Brown and Miriam E. Leeser, "From Programs to Transistors: Verifying Hardware Synthesis Tools," in Workshop on Hardware Specification, Verification and Synthesis: Mathematical Aspects., Volume 408 of Lecture Notes in Computer Science, pp. 128-150. Springer Verlag, 1989.
    • (1989) Lecture Notes in Computer Science , vol.408 , pp. 128-150
    • Brown, G.M.1    Leeser, M.E.2
  • 12
    • 2342534789 scopus 로고
    • Verification of Synchronous Circuits by Symbolic Logic Simulation
    • Hardware Specification, Verification and Synthesis: Mathematical Aspects., Springer Verlag
    • R.E. Bryant, "Verification of Synchronous Circuits by Symbolic Logic Simulation," in Hardware Specification, Verification and Synthesis: Mathematical Aspects., Volume 408 of Lecture Notes in Computer Science, pp. 14-24. Springer Verlag, 1989.
    • (1989) Lecture Notes in Computer Science , vol.408 , pp. 14-24
    • Bryant, R.E.1
  • 13
    • 0005060727 scopus 로고
    • Hardware Verification Using Higher-order Logic
    • in D. Borrione, editor, Elsevier Science Publishers, Amsterdam
    • A. Camilleri, M. Gordon, and T. Melham, "Hardware Verification Using Higher-order Logic," in D. Borrione, editor, From HDL Descriptions to Guaranteed Correct Circuit Designs, pp. 43-67. Elsevier Science Publishers, Amsterdam, 1987.
    • (1987) From HDL Descriptions to Guaranteed Correct Circuit Designs , pp. 43-67
    • Camilleri, A.1    Gordon, M.2    Melham, T.3
  • 14
    • 0005031024 scopus 로고
    • A Proof of Correctness of the VIPER Microprocessor: The First Level
    • G. Birtwistle and P.A. Subrahmanyam, editors, Kluwer Academic Publishers, Boston, MA
    • Avra Cohn, "A Proof of Correctness of the VIPER Microprocessor: The First Level," in G. Birtwistle and P.A. Subrahmanyam, editors, VLSI Specification, Verification and Synthesis, pp. 27-71. Kluwer Academic Publishers, Boston, MA, 1988.
    • (1988) VLSI Specification, Verification and Synthesis , pp. 27-71
    • Cohn, A.1
  • 15
    • 0010118464 scopus 로고
    • Divisional Memo (CC2) 411-87, Royal Signals and Radar Establishment, Malvern, Worcestershire (United Kingdom), August
    • W.J. Cullyer. Implementing Safety Critical Systems: The VIPER Microprocessor. Divisional Memo (CC2) 411-87, Royal Signals and Radar Establishment, Malvern, Worcestershire (United Kingdom), August 1987.
    • (1987) Implementing Safety Critical Systems: The VIPER Microprocessor
    • Cullyer, W.J.1
  • 18
    • 2342647814 scopus 로고
    • Ph. D. Dissertation, The University of Texas at Austin, December, Also available (minus certain appendices) from Computational Logic as CLI Technical Report 83
    • Arthur D. Flatau, A Verified Implementation of an Applicative language with Dynamic Storage Allocation. Ph. D. Dissertation, The University of Texas at Austin, December, 1992. Also available (minus certain appendices) from Computational Logic as CLI Technical Report 83.
    • (1992) A Verified Implementation of An Applicative Language with Dynamic Storage Allocation
    • Flatau, A.D.1
  • 20
    • 2342572643 scopus 로고
    • Why Higher-order Logic is a Good Formalism for Specifying and Verifying Hardware
    • University of Cambridge, Computer Laboratory, September
    • M.J.C. Gordon. Why Higher-order Logic is a Good Formalism for Specifying and Verifying Hardware. Technical Report 77, University of Cambridge, Computer Laboratory, September 1985.
    • (1985) Technical Report 77
    • Gordon, M.J.C.1
  • 22
    • 0039233953 scopus 로고
    • FM8501: A Verified Microprocessor
    • Springer-Verlag
    • Warren A. Hunt, Jr., FM8501: A Verified Microprocessor, LNCS 795, Springer-Verlag, 1994.
    • (1994) LNCS , vol.795
    • Hunt Jr., W.A.1
  • 23
    • 0024941626 scopus 로고
    • Microprocessor Design Verification
    • December
    • Warren A. Hunt, Jr., "Microprocessor Design Verification," Journal of Automated Reasoning, 5(4):429-460, December 1989.
    • (1989) Journal of Automated Reasoning , vol.5 , Issue.4 , pp. 429-460
    • Hunt Jr., W.A.1
  • 24
    • 0041012458 scopus 로고
    • A Formal HDL and Its Use in the FM9001 Verification
    • C.A.R. Hoare and M.J.C. Gordon, editors, Prentice-Hall International Series in Computer Science, Englewood Cliffs, N.J.
    • Warren A. Hunt, Jr. and Bishop Brock, "A Formal HDL and Its Use in the FM9001 Verification," in C.A.R. Hoare and M.J.C. Gordon, editors, Mechanized Reasoning and Hardware Design, pp. 35-48. Prentice-Hall International Series in Computer Science, Englewood Cliffs, N.J., 1992.
    • (1992) Mechanized Reasoning and Hardware Design , pp. 35-48
    • Hunt Jr., W.A.1    Brock, B.2
  • 25
    • 33645908110 scopus 로고
    • Proving a Computer Correct in Higher Order Logic
    • University of Calgary, Department of Computer Science, August
    • Graham Birtwistle, Jeffery Joyce, and Mike Gordon. Proving a Computer Correct in Higher Order Logic. Technical report, University of Calgary, Department of Computer Science, August 1985.
    • (1985) Technical Report
    • Birtwistle, G.1    Joyce, J.2    Gordon, M.3
  • 26
    • 2342639944 scopus 로고
    • Manipulating Logical Organization with System Factorizations
    • Hardware Specification, Verification and Synthesis: Mathematical Aspects., Springer Verlag
    • Steven D. Johnson, "Manipulating Logical Organization with System Factorizations," in Hardware Specification, Verification and Synthesis: Mathematical Aspects., Volume 408 of Lecture Notes in Computer Science, pp. 259-280. Springer Verlag, 1989.
    • (1989) Lecture Notes in Computer Science , vol.408 , pp. 259-280
    • Johnson, S.D.1
  • 29
    • 2342473608 scopus 로고
    • It's Past Time for Practical Computer Checked Proofs of Program Correctness
    • Brussels, Esprit Basic Research Series, DG XIII, Commission of the European Communities, Springer-Verlag, November
    • John McCarth,. "It's Past Time for Practical Computer Checked Proofs of Program Correctness," Computational Logic, Symposium Proceedings, Brussels, Esprit Basic Research Series, DG XIII, Commission of the European Communities, Springer-Verlag, November 1990.
    • (1990) Computational Logic, Symposium Proceedings
    • McCarth, J.1
  • 31
    • 2342572644 scopus 로고
    • PITON: A Verified Assembly Level Language
    • Computational Logic, To appear as a book in the Kluwer's series on automated reasoning under the title Piton: A Mechanically Verified Assembly-Level Language
    • J Strother Moore. PITON: A Verified Assembly Level Language. Technical Report 22, Computational Logic, 1988. To appear as a book in the Kluwer's series on automated reasoning under the title Piton: A Mechanically Verified Assembly-Level Language.
    • (1988) Technical Report 22
    • Moore, J.S.1
  • 32
    • 0024884150 scopus 로고
    • A Mechanically Verified Language Implementation
    • December Also published as CLI Technical Report 30
    • J Strother Moore, "A Mechanically Verified Language Implementation," Journal of Automated Reasoning, Vol. 5, pp. 493-518, December 1989. Also published as CLI Technical Report 30.
    • (1989) Journal of Automated Reasoning , vol.5 , pp. 493-518
    • Moore, J.S.1
  • 33
    • 0004334773 scopus 로고
    • Special Issue on System Verification
    • J Strother Moore, et al., "Special Issue on System Verification," Journal of Automated Reasoning, Vol. 5, No. 4, pp. 409-530, 1989.
    • (1989) Journal of Automated Reasoning , vol.5 , Issue.4 , pp. 409-530
    • Moore, J.S.1
  • 34
    • 0344076604 scopus 로고
    • Formal Verification by Symbolic Evaluation of Partially-Ordered Trajectories
    • Computer Science Department, University of British Columbia
    • Carl-Johan H. Seger and Randy E. Bryant. Formal Verification by Symbolic Evaluation of Partially-Ordered Trajectories. Technical Report 93-8. Computer Science Department, University of British Columbia, 1993.
    • (1993) Technical Report 93-8
    • Seger, C.-J.H.1    Bryant, R.E.2
  • 35
    • 0025493701 scopus 로고
    • Formal Verification of a Pipelined Microprocessor
    • September
    • Mandayam Srivas and Mark Bickford, "Formal Verification of a Pipelined Microprocessor," IEEE Software, Vol. 7, pp. 52-64, September 1990.
    • (1990) IEEE Software , vol.7 , pp. 52-64
    • Srivas, M.1    Bickford, M.2
  • 36
    • 0003411617 scopus 로고
    • Formal Verification of a Commercial Microprocessor
    • Computer Science Laboratory, SRI International, Menlo Park, CA, Feb.
    • Mandayam Srivas and Steven P. Miller. Formal Verification of a Commercial Microprocessor. Technical Report SRI-CSL-95-4. Computer Science Laboratory, SRI International, Menlo Park, CA, Feb. 1995.
    • (1995) Technical Report SRI-CSL-95-4
    • Srivas, M.1    Miller, S.P.2
  • 37
    • 84947483205 scopus 로고
    • A Mechanically Verified Application for a Mechanically Verified Environment
    • Fifth Conference on Computer-Aided Verification, Springer-Verlag, Also available as Technical Report 78, Computational Logic, 1994
    • Matthew Wilding, "A Mechanically Verified Application for a Mechanically Verified Environment," Fifth Conference on Computer-Aided Verification, Lecture Notes in Computer Science, LNCS 697, pp. 268-279, Springer-Verlag, 1993. Also available as Technical Report 78, Computational Logic, 1994.
    • (1993) Lecture Notes in Computer Science, LNCS , vol.697 , pp. 268-279
    • Wilding, M.1
  • 38
    • 2342517100 scopus 로고
    • Specification, Construction, and Mechanically-checked Verification of a Simple Realtime Executive
    • in preparation
    • Matthew Wilding, "Specification, Construction, and Mechanically-checked Verification of a Simple Realtime Executive," Computational Logic Technical Report (in preparation), 1995.
    • (1995) Computational Logic Technical Report
    • Wilding, M.1
  • 39
    • 0029218969 scopus 로고
    • Formal Modeling and Verification of Microprocessors
    • Jan.
    • Phillip J. Windley, "Formal Modeling and Verification of Microprocessors," IEEE Transactions on Computers, Vol. 44, No. 1, Jan. 1995, pp. 54-72.
    • (1995) IEEE Transactions on Computers , vol.44 , Issue.1 , pp. 54-72
    • Windley, P.J.1
  • 41
    • 2342448290 scopus 로고
    • Ph. D. Dissertation, University of Texas at Austin
    • William D. Young, A Verified Code Generator. Ph. D. Dissertation, University of Texas at Austin, 1988. See also Computational Logic Technical Report Number 37, 1988.
    • (1988) A Verified Code Generator
    • Young, W.D.1
  • 42
  • 43
    • 0024884150 scopus 로고
    • A Mechanically Verified Code Generator
    • December, Also available from Computational Logic as Technical Report 37
    • William D. Young, "A Mechanically Verified Code Generator," Journal of Automated Reasoning, Vol. 5, Number 4, (December, 1989), pp. 493-518. Also available from Computational Logic as Technical Report 37.
    • (1989) Journal of Automated Reasoning , vol.5 , Issue.4 , pp. 493-518
    • Young, W.D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.