-
2
-
-
0348233280
-
"A 12-bit 75-MS/s Pipelined ADC Using Open-Loop Residue Amplification"
-
Dec
-
B. Murmann and B.E. Boser, "A 12-bit 75-MS/s Pipelined ADC Using Open-Loop Residue Amplification," IEEE J. Solid-State Circuits, vol. 41, no. 12, Dec. 2003, pp. 2040-2050.
-
(2003)
IEEE J. Solid-State Circuits
, vol.41
, Issue.12
, pp. 2040-2050
-
-
Murmann, B.1
Boser, B.E.2
-
3
-
-
18444378113
-
"A 12-bit 80MSample/s Pipelined ADC with Bootstrapped Digital Calibration"
-
C. R. Grace et al., "A 12-bit 80MSample/s Pipelined ADC with Bootstrapped Digital Calibration," IEEE J. Solid-State Circuits, vol. 42, no. 12, Dec. 2004, pp. 1038-1046.
-
(2004)
IEEE J. Solid-State Circuits
, vol.42
, Issue.12
, pp. 1038-1046
-
-
Grace, C.R.1
-
4
-
-
0032592096
-
"Design Challenges of Technology Scaling"
-
Jul.-Aug
-
S. Borkar, "Design Challenges of Technology Scaling," IEEE Micro, vol. 19, no. 4, Jul.-Aug. 1999, pp. 23-29.
-
(1999)
IEEE Micro
, vol.19
, Issue.4
, pp. 23-29
-
-
Borkar, S.1
-
5
-
-
0141954044
-
"Background Calibration Techniques for Multistage Pipelined ADCs with Digital Redundancy"
-
Sept
-
J. Li and U.-K. Moon, "Background Calibration Techniques for Multistage Pipelined ADCs with Digital Redundancy," IEEE Trans. Circuits and Systems II, vol. 50, no. 9, Sept. 2003, pp. 531-538.
-
(2003)
IEEE Trans. Circuits and Systems II
, vol.50
, Issue.9
, pp. 531-538
-
-
Li, J.1
Moon, U.-K.2
-
6
-
-
0018470554
-
"A Dynamic Amplifier for MOS-Technology"
-
May
-
M. Copeland and J. Rabaey, "A Dynamic Amplifier for MOS-Technology," Electronics Letters, vol. 15, May 1979, pp. 301-302.
-
(1979)
Electronics Letters
, vol.15
, pp. 301-302
-
-
Copeland, M.1
Rabaey, J.2
-
7
-
-
39749104404
-
"Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies"
-
IEEE Press
-
T. Sepke et al., "Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies," in Digest Tech. Papers IEEE Int'l Solid-State Circuits Conf. (ISSCC 06), IEEE Press, 2006, pp. 220-221.
-
(2006)
Digest Tech. Papers IEEE Int'l Solid-State Circuits Conf. (ISSCC 06)
, pp. 220-221
-
-
Sepke, T.1
-
8
-
-
33645975994
-
"A Flexible ADC Approach for Mixed-Signal SoC Platforms"
-
IEEE Press
-
A. Zanikopoulos et al., "A Flexible ADC Approach for Mixed-Signal SoC Platforms," Proc. Int'l Symp. Circuits and Systems (ISCAS 05), vol. 5, IEEE Press, 2005, pp. 4839-4842.
-
(2005)
Proc. Int'l Symp. Circuits and Systems (ISCAS 05)
, vol.5
, pp. 4839-4842
-
-
Zanikopoulos, A.1
-
9
-
-
3042839291
-
"A Channelized Digital Ultra-wideband Receiver"
-
Mar
-
W. Namgoong, "A Channelized Digital Ultra-wideband Receiver," IEEE Trans. Wireless Comm., vol. 2, no. 2, Mar. 2003, pp. 502-510.
-
(2003)
IEEE Trans. Wireless Comm.
, vol.2
, Issue.2
, pp. 502-510
-
-
Namgoong, W.1
-
10
-
-
33645982731
-
"System Embedded ADC Calibration for OFDM Receivers"
-
to be published
-
Y. Oh and B. Murmann, "System Embedded ADC Calibration for OFDM Receivers," to be published in IEEE Trans. Circuits Syst.
-
IEEE Trans. Circuits Syst.
-
-
Oh, Y.1
Murmann, B.2
-
11
-
-
0842332427
-
"Minimizing the Peak-to-Average Power Ratio of OFDM Signals via Convex Optimization"
-
IEEE Press
-
A. Aggarwal and T.H. Meng, "Minimizing the Peak-to-Average Power Ratio of OFDM Signals via Convex Optimization," Proc. IEEE Global Telecommunications Conf., IEEE Press, 2003, pp. 2385-2389.
-
(2003)
Proc. IEEE Global Telecommunications Conf.
, pp. 2385-2389
-
-
Aggarwal, A.1
Meng, T.H.2
-
13
-
-
0742268982
-
"A Wideband 2.4-GHz Delta-Sigma Fractional-NPLL with 1-Mb/s Inloop Modulation"
-
Jan
-
S. Pamarti et al., "A Wideband 2.4-GHz Delta-Sigma Fractional-NPLL with 1-Mb/s Inloop Modulation," IEEE J. Solid-State Circuits, vol. 42, no. 1, Jan. 2004, pp. 49-62.
-
(2004)
IEEE J. Solid-State Circuits
, vol.42
, Issue.1
, pp. 49-62
-
-
Pamarti, S.1
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