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Volumn , Issue , 2005, Pages 378-384

Drowsy region-based caches: Minimizing both dynamic and static power dissipation

Author keywords

Drowsy caches; Energy aware design; Region based caches

Indexed keywords

DROWSY CACHES; ENERGY-AWARE DESIGN; REGION-BASED CACHES;

EID: 33644640887     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1062261.1062322     Document Type: Conference Paper
Times cited : (13)

References (17)
  • 4
    • 0033358971 scopus 로고    scopus 로고
    • Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation
    • August
    • K. Ghose and M. B. Kamble. Reducing Power in Superscalar Processor Caches using Subbanking, Multiple Line Buffers and Bit-Line Segmentation. Proc. Int'l Symp. on Low Power Electronics and Design, pp. 70-75, August 1999.
    • (1999) Proc. Int'l Symp. on Low Power Electronics and Design , pp. 70-75
    • Ghose, K.1    Kamble, M.B.2
  • 8
    • 1642310480 scopus 로고    scopus 로고
    • Circuit and microarchitectural techniques for reducing cache leakage power
    • February
    • N. S. Kim, K. Flautner, D. Blaauw, and T. Mudge. Circuit and Microarchitectural Techniques for Reducing Cache Leakage Power. IEEE Transactions on VLSI, Vol. 12, No. 2, pp. 167-184, February 2004.
    • (2004) IEEE Transactions on VLSI , vol.12 , Issue.2 , pp. 167-184
    • Kim, N.S.1    Flautner, K.2    Blaauw, D.3    Mudge, T.4
  • 9
    • 0033889397 scopus 로고    scopus 로고
    • Filtering memory references to increase energy efficiency
    • January
    • J. Kin, M. Gupta, and W. H. Mangione-Smith. Filtering Memory References to Increase Energy Efficiency. IEEE Transactions on Computers, Vol. 49, No. 1, pp. 1-15, January 2000.
    • (2000) IEEE Transactions on Computers , vol.49 , Issue.1 , pp. 1-15
    • Kin, J.1    Gupta, M.2    Mangione-Smith, W.H.3
  • 12
    • 0030673565 scopus 로고    scopus 로고
    • A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor
    • January
    • J. Montanaro, et al. A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor. Digital Technical Journal, Vol. 9 No. 1, pp. 49-62, January 1997.
    • (1997) Digital Technical Journal , vol.9 , Issue.1 , pp. 49-62
    • Montanaro, J.1
  • 16
    • 34249306904 scopus 로고    scopus 로고
    • HotLeakage: A temperature-aware model of subthreshold and gate leakage for architects
    • University of Virginia Department of Computer Science, March
    • Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects. Technical Report CS-2003-05, University of Virginia Department of Computer Science, March 2003.
    • (2003) Technical Report , vol.CS-2003-05
    • Zhang, Y.1    Parikh, D.2    Sankaranarayanan, K.3    Skadron, K.4    Stan, M.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.