Static classification of value predictability using compiler hints

IEEE Transactions on Computers

Volumn 53, Issue 8, 2004, Pages 929-944

  Zhao, Qing ^a   Lilja, David J ^b  

^a SUN MICROSYSTEMS   (United States)

^b University of Minnesota   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER PROGRAM LISTINGS; COMPUTER SIMULATION; HEURISTIC PROGRAMMING; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

COMPILER HEURISTICS; STATIC CLASSIFICATION VALUE PREDICTOR; SUPERSCALAR PROCESSORS; VALUE LOCALITY; VALUE PREDICTABILITY PATTERN; VALUE PREDICTION;

PROGRAM COMPILERS;

EID: 3242735052     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2004.49     Document Type: Article

References (28)

1. F. Gabbay and A. Mendelson, "The Effect of Instruction Fetch Bandwidth on Value Prediction," Proc. 25th Int'l Symp. Computer Architecture, pp. 272-281, 1998.
2. S. Lee, Y. Wang, and P. Yew, "Decoupling Value Prediction on Trace Processors," Proc. Sixth Int'l Symp. High Performance Computer Architecture, 1999.
3. M. Lipasti and J. Shen, "Exceeding the DataFlow Limit via Value Prediction," Proc. 29th Int'l Symp. Microarchitecture, pp. 226-237, Dec. 1996.
4. F. Gabbay and A. Mendelson, "Speculative Execution Based on Value Prediction," Electrical Eng. Dept. Technical Report 1080, Technion-Israel Inst. of Technology, Nov. 1996.
5. Y. Sazeides and J. Smith, "The Predictability of Data Values," Proc. 30th Int'l Symp. Microarchitecture, pp. 248-258, Dec. 1997.
6. K. Wang and M. Franklin, "Highly Accurate Data Value Predictions Using Hybrid Predictors," Proc. 30th Int'l Symp. Microarchitecture, pp. 281-290, Dec. 1997.
7. B. Rychlik, J. Faistl, B. Krug, A. Kurland, J. Jung, M. Velev, and J. Shen, "Efficient and Accurate Value Prediction Using Dynamic Classification," technical report, Microarchitecture Research Team, Dept. of Electrical and Computer Eng., Carnegie Mellon Univ., 1998.
8. B. Rychlik, J. Faistl, B. Krug, and J. Shen, "Efficacy and Performance Impact of Value Prediction," Proc. Parallel Architectures and Compilation Techniques, Oct. 1998.
9. Q. Zhao and D.J. Lilja, "Compiler-Directed Classification of Value Locality Behavior," Proc. Int'l Conf. Computer Design, Sept. 2001.
10. D. Connors and W. Hwu, "Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results," Proc. 32nd Annual Int'l Symp. Microarchitecture, Nov. 1999.
11. E. Larson and T. Austin, "Compiler Controlled Value Prediction Using Branch Predictor Based Confidence," Proc. 33rd Ann. ACM/IEEE Int'l Symp. Microarchitecture, Dec. 2000.
12. S.S. Muchnick, Advanced Compiler Design Implementation. San Francisco: Morgan Kaufmann, 1997.
13. A. Sodani and G. Sohi, "An Empirical Analysis of Instruction Repetition," Proc. Eighth Int'l Conf. Architectural Support for Programming Languages and Operating Systems, pp. 35-45, Oct. 1998.
14. D. Burger, T. Austin, and S. Bennett, "The Simplescalar Tool Set, Version 2.0," Technical Report 1342, Computer Science Dept., Univ. of Wisconsin, Madison, 1996.
15. E. Rotenberg, S. Bennett, and J. Smith, "Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching," Proc. 29th Ann. ACM/IEEE Int'l Symp. Microarchitecture, pp. 24-35, Dec. 1996.
16. A.J. KleinOsowski, J. Flynn, N. Meares, and D.J. Lilja, "Adapting the SPEC 2000 Benchmark Suite for Simulation-Based Computer Architecture Research," Proc. Workshop Workload Characterization, Int'l Conf. Computer Design, Sept. 2000.
17. Q. Zhao, S. Lee, and D.J. Lilja, "Using Hyperprediction to Compensate for Delayed Updates in Value Predictors," Laboratory for Advanced Research in Computing Technology and Compilers Technical Report No. ARCTiC 01-02, June 2001.
18. T. Sato, "Analyzing Overhead of Reissued Instructions on Data Speculative Processors," Proc. Workshop Performance Analysis and Its Impaction on Design, 25th Int'l Symp. Computer Architecture, 1998.
19. B. Calder, G. Reinmann, and D. Tullsen, "Selective Value Prediction," Proc. 26th Int'l Symp. Computer Architecture, pp. 64-74, May 1999.
20. F. Gabbay and A. Mendelson, "Can Program Profiling Support Value Prediction?" Proc. 30th Int'l Symp. Microarchitecture, pp. 270-280, Dec. 1997.
21. Y. Sazeides and J.E. Smith, "Modeling Program Predictability," Proc. 25th Int'l Symp. Computer Architecture, pp. 73-84, June 1998.
22. R.J. Eickemeyer and S. Vassiliadis, "A Load Instruction Unit for Pipelined Processors," IBM J. Research and Development, vol. 37, no. 4, pp. 547-564, July 1993.
23. B. Calder, P. Feller, and A. Eustace, "Value Profiling," Proc. IEEE/ACM Ann. Symp. Microarchitecture, pp. 259-269, Dec. 1997.
24. T.H. Heil, Z. Smith, and J.E. Smith, "Improving Branch Predictors by Correlating on Data Values," Proc. IEEE/ACM Ann. Symp. Microarchitecture, pp. 28-37, Dec. 1999.
25. B. Goeman, H. Vandierendonck, and K. de Bosschere, "Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency," Proc. Int'l Symp. High-Performance Computer Architecture, pp. 207-216, Jan. 2001.
26. Y. Sazeides and J.E. Smith, "Implementations of Context-Based Value Predictors," Univ. of Wisconsin Technical Report ECE97-8, 1997.
27. R. Bodik, "Path-Sensitive Value-Flow Optimizations of Programs," PhD dissertation, Univ. of Pittsburgh, Nov. 1999.
28. M. Burtscher, A. Diwan, and M. Hauswirth, "Static Load Classification for Improving the Value Predictability of Data-Cache Misses," Proc. Conf. Programming Language Design and Implementation (PLDI), pp. 222-233, June 2002.