An investigation into the effects of probing and wire bonding stress on the reliability of BOAC

Microelectronics Reliability

Volumn 46, Issue 2-4, 2006, Pages 335-342

  Chen, K M ^a   Wu, B C ^a   Tang, K H ^a   Cheng, F Y ^a   Kao, N H ^b   Lai, J Y ^b  

^a UNITED MICROELECTRONICS CORPORATION   (Taiwan)

^b SILICONWARE PRECISION INDUSTRIES CO LTD   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; DIMENSIONAL STABILITY; ELECTRIC WIRE; FINITE ELEMENT METHOD; RELIABILITY; STATIC RANDOM ACCESS STORAGE; TEST FACILITIES;

BOAC; FLUORINATED SILICATE GLASS (FSG); PROBING; WIRE BONDING STRESS;

STRESS ANALYSIS;

EID: 30844471782     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2005.02.016     Document Type: Article

References (6)

1. International technology roadmap for semiconductors, 2003 Edition, 2003.
2. Heinen G, Stierman RJ, Edwards D, Nye L. Wire bonds over active circuits. In: Proceedings of electronic components and technology conference, Washington, DC, USA, 1994. p. 922-8.
3. K.-Y. Chou, M.-J. Chen, and C.-W. Liu Active devices under CMOS I/O pads IEEE Trans Electron Dev 49 12 2002 2279 2287
4. K.-Y. Chou, and M.-J. Chen ESD protection under grounded-up bond pads in 0.13 μm eight-level copper metal, fluorinated silicate glass low-k intermetal dielectric CMOS process technology IEEE Electron Dev Lett 22 7 2001 342 344
5. M.-D. Ker, T.-Y. Chen, C.-Y. Wu, and H.-H. Chang ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications IEEE J Solid-State Circuits 35 8 2000 1194 1199
6. Feng H, Zhan R, Chen G, Wu Q, Guang X, Xie H, et al. Bonding-pad-oriented on-chip ESD protection structures for ICs. In: Proceedings of international symposium on circuits and systems, vol. 1, May 2003. p. I-741-3.