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Electrochemical and Solid-State Letters

Volumn 7, Issue 7, 2004, Pages

A method for fabricating a superior oxide/nitride/oxide gate stack

(5) Chang, T C a Yan, S T b Liu, P T c Wang, M C d Sze, S M b,c

a NATIONAL SUN YAT SEN UNIVERSITY (Taiwan)

b NATIONAL CHIAO TUNG UNIVERSITY (Taiwan)

c NATIONAL NANO DEVICE LABORATORIES (Taiwan)

d NATIONAL TSING HUA UNIVERSITY (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DIELECTRIC PROPERTIES OF SOLIDS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; FOURIER TRANSFORM INFRARED SPECTROSCOPY; OXIDATION; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; SEMICONDUCTING SILICON; SILICON NITRIDE; SUBSTRATES; THYRISTORS;

ATMOSPHERIC PRESSURE CHEMICAL VAPOR DEPOSITION (APCVD); NONVOLATILE SEMICONDUCTOR MEMORY (NVSM); OXIDE/NITRIDE/OXIDE (ONO); TUNNEL OXIDES;

SOLID STATE DEVICES;

EID: 3042754014 PISSN: 10990062 EISSN: None Source Type: Journal
DOI: 10.1149/1.1738473 Document Type: Article

Times cited : (2)

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