Low-k dielectrics: will spin-on or CVD prevail?

Semiconductor International

Volumn 23, Issue 6, 2000, Pages

  Peters, Laura ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CHEMICAL VAPOR DEPOSITION; COPPER; HYDROCARBONS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; MASKS; PERMITTIVITY; POLISHING; SILANES; SILICON CARBIDE;

CHEMICAL MECHANICAL POLISHING; INTERLEVEL DIELECTRIC; SPIN ON DIELECTRIC;

DIELECTRIC MATERIALS;

EID: 3042720337     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (4)

1. L. Peters, "Solving the Integration Challenges of Low-k Dielectrics," Semiconductor International, Nov. 1999, p 56.
2. P. Nunan, "The Challenge of Low k, Issues and Considerations for Accelerated Performance," Yield Management Solutions, Spring 2000, p. 17.
3. P. Xu, et al, "BLOk - A Low-k Dielectric Barrier/Etch Stop Film for Copper Damascene Applications," Proc. 1999 IEEE Int'l Interconnect Technology Conf., p.109.
4. M.J. Loboda, "New Solutions for Intermetal Dielectrics Using Trimethylsilane-Based PECVD Processes," Microelectronics Engineering, Vol. 50, 2000, p.15.