-
1
-
-
51249173817
-
Randomized rounding: A technique for provably good algorithms and algorithmic proofs
-
P. Raghavan and C. Thompson, Randomized rounding: A technique for provably good algorithms and algorithmic proofs, Combinatorica, vol. 7, no. 4, pp. 365-374, 1987
-
(1987)
Combinatorica
, vol.7
, Issue.4
, pp. 365-374
-
-
Raghavan, P.1
Thompson, C.2
-
2
-
-
0344945173
-
Synthesis of built-in test circuits for automata with memory
-
G. Aksenova and E. Sogomonyan, Synthesis of built-in test circuits for automata with memory, Automation and Remote Control, vol. 32, no. 9, pp. 1492-1500, 1971
-
(1971)
Automation and Remote Control
, vol.32
, Issue.9
, pp. 1492-1500
-
-
Aksenova, G.1
Sogomonyan, E.2
-
3
-
-
3042552304
-
An algebraic model for the hardware monitoring of automata
-
V. V. Danilov, N. V. Kolesov, and B. P. Podkopaev, An algebraic model for the hardware monitoring of automata, Automation and Remote Control, vol. 36, no. 6, pp. 984-991, 1975
-
(1975)
Automation and Remote Control
, vol.36
, Issue.6
, pp. 984-991
-
-
Danilov, V.V.1
Kolesov, N.V.2
Podkopaev, B.P.3
-
4
-
-
84904779899
-
Design of self-checking built-in check circuits for automata with memory
-
G. Aksenova and E. Sogomonyan, Design of self-checking built-in check circuits for automata with memory, Automation and Remote Control, vol. 36, no. 7, pp. 1169-1177, 1975
-
(1975)
Automation and Remote Control
, vol.36
, Issue.7
, pp. 1169-1177
-
-
Aksenova, G.1
Sogomonyan, E.2
-
5
-
-
0024090525
-
Design of self-checking sequential machines
-
S. Dhawan and R. C. De Vries, Design of self-checking sequential machines, IEEE Transactions on Computers, vol. 37, no. 10, pp. 1280-1284, 1988
-
(1988)
IEEE Transactions on Computers
, vol.37
, Issue.10
, pp. 1280-1284
-
-
Dhawan, S.1
De Vries, R.C.2
-
7
-
-
0028710572
-
Bounding error masking in linear output space compression schemes
-
S. Tarnick, Bounding error masking in linear output space compression schemes, in Asian Test Symposium, 1994, pp. 27-32
-
(1994)
Asian Test Symposium
, pp. 27-32
-
-
Tarnick, S.1
-
8
-
-
0029379286
-
Concurrent error detection using monitoring machines
-
R. A. Parekhji, G. Venkatesh, and S. D. Sherlekar, Concurrent error detection using monitoring machines, IEEE Design and Test of Computers, vol. 12, no. 3, pp. 24-32, 1995
-
(1995)
IEEE Design and Test of Computers
, vol.12
, Issue.3
, pp. 24-32
-
-
Parekhji, R.A.1
Venkatesh, G.2
Sherlekar, S.D.3
-
9
-
-
0030107735
-
Self-checking design in eastern europe
-
S. J. Piestrak, Self-checking design in Eastern Europe, IEEE Design and Test of Computers, vol. 13, no. 1, pp. 16-25, 1996
-
(1996)
IEEE Design and Test of Computers
, vol.13
, Issue.1
, pp. 16-25
-
-
Piestrak, S.J.1
-
10
-
-
0030285141
-
Test response compaction using multiplexed parity trees
-
K. Chakrabarty and J. P. Hayes, Test response compaction using multiplexed parity trees, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, vol. 15, no. 11, pp. 1399-1408, 1996
-
(1996)
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
, vol.15
, Issue.11
, pp. 1399-1408
-
-
Chakrabarty, K.1
Hayes, J.P.2
|