Self-checking design in Eastern Europe

IEEE Design and Test of Computers

Volumn 13, Issue 1, 1996, Pages 16-25

  Piestrak, Stanislaw J ^a,b,c,d  

^a WROCLAW UNIVERSITY OF TECHNOLOGY   (Poland)

^b TIMA LABORATORY   (France)

^c INPG ^*

^d IEEE

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); ELECTRIC NETWORK SYNTHESIS; ELECTRONIC EQUIPMENT TESTING; ERROR DETECTION; INTEGRATED CIRCUIT TESTING; VLSI CIRCUITS;

SELF CHECKING CIRCUITS;

DIGITAL CIRCUITS;

EID: 0030107735     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.485779     Document Type: Article

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