Measuring the span of stress asymmetries on high-precision matched devices

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2004, Pages 117-122

  Tuinhout, H P ^a   Bretveld, A ^b   Peters, W C M ^c  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b Innovation Laboratory   (Netherlands)

^c NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; CAPACITORS; ELECTRIC INDUCTORS; INTEGRATED CIRCUITS; MOSFET DEVICES; POLYSILICON; STATISTICAL METHODS; STRESSES;

DOPANTS; EMITTERS; MIRROR TRANSISTORS;

MIXER CIRCUITS;

EID: 3042606174     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. R.W. Gregor, "On the Relationship Between Topography and Transistor Matching in Analog CMOS Technology", IEEE Transactions on Electron Devices Vol. 39, No. 2, pp. 275-282, February 1992.
2. A. Pergoot, P. Cox, P. Vercruysse, I. Wuyts and P. Raes. " New Method for Monitoring of Analogue Process - Evaluation of the Impact of Metalisation on the Performance of Precise Analogue Resistors " ICMTS98 Proceedings of the IEEE International Conference on Microelectronic Test Structures, pp. 13-17, March 1998.
3. H.P. Tuinhout, A. Bretveld and W.C.M. Peters, "Current mirror test structures for studying adjacent layout effects on systematic transistor mismatch" ICMTS03 Proceedings of the IEEE International Conference on Microelectronic Test Structures, pp. 221-226, March 2003.
4. H.P. Tuinhout and M. Vertregt, "Test Structures for Investigation of Metal Coverage Effects on MOSFET Matching", ICMTS97 Proceedings of the IEEE International Conference on Microelectronic Test Structures, pp. 179-183, March 1997.
5. H.P. Tuinhout and M. Vertregt, "Characterization of Systematic MOSFET Current Factor Mismatch Caused by Metal CMP Dummy Structures", IEEE Transactions on Semiconductor Manufacturing, Vol. 14 No. 4, pp. 302-310, November 2001.