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Volumn , Issue , 2005, Pages 236-238

NTUplace: A ratio partitioning based placement algorithm for large-scale mixed-size designs

Author keywords

Mincut; Placement; Ratio Cut

Indexed keywords

HIERARCHICAL SYSTEMS; INTEGRATED CIRCUITS; PROBLEM SOLVING;

EID: 29144523870     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (55)

References (11)
  • 1
    • 29144481364 scopus 로고    scopus 로고
    • Placement Utilities, http://vlsicad.eecs.umich.edu/BK/PlaceUtils/.
    • Placement Utilities
  • 2
    • 0346148463 scopus 로고    scopus 로고
    • On whitespace and stability in mixed-size placement and physical synthesis
    • S. N. Adya, I. L. Markov, and P. G. Villarrubia. On whitespace and stability in mixed-size placement and physical synthesis. Proc. of ICCAD, pages 311-318, 2003.
    • (2003) Proc. of ICCAD , pp. 311-318
    • Adya, S.N.1    Markov, I.L.2    Villarrubia, P.G.3
  • 4
    • 0033697586 scopus 로고    scopus 로고
    • Can recursive bisection alone produce routable standard-cell layout
    • A. E. Caldwell, A. B. Kahng, and I. L. Markov. Can recursive bisection alone produce routable standard-cell layout. Proc. of DAC, pages 477-482, 2000.
    • (2000) Proc. of DAC , pp. 477-482
    • Caldwell, A.E.1    Kahng, A.B.2    Markov, I.L.3
  • 5
    • 84954416950 scopus 로고    scopus 로고
    • Multi-level placement for large-scale mixed-size ic designs
    • C.-C. Chang, J. Cong, and X. Yuan. Multi-level placement for large-scale mixed-size ic designs. Proc. of ASPDAC, 2003.
    • (2003) Proc. of ASPDAC
    • Chang, C.-C.1    Cong, J.2    Yuan, X.3
  • 7
    • 84861421567 scopus 로고    scopus 로고
    • Fast floorplanning by look-ahead enable recursive bipartitioning
    • J. Cong and J. Xu. Fast floorplanning by look-ahead enable recursive bipartitioning. Proc. of ASPDAC, 2005.
    • (2005) Proc. of ASPDAC
    • Cong, J.1    Xu, J.2
  • 8
    • 0031632293 scopus 로고    scopus 로고
    • Multielevel optimization in vlsi/cad
    • H. Eisenmann and F. M. Johannes. Multielevel optimization in vlsi/cad. Proc. of DAC, pages 269-274, 1998.
    • (1998) Proc. of DAC , pp. 269-274
    • Eisenmann, H.1    Johannes, F.M.2
  • 9
    • 2942682815 scopus 로고    scopus 로고
    • Implementation and extensibility of an analytic placer
    • A. B. Kahng and Q. Wang. Implementation and extensibility of an analytic placer. Proc. of ISPD, pages 18-25, 2003.
    • (2003) Proc. of ISPD , pp. 18-25
    • Kahng, A.B.1    Wang, Q.2
  • 10
    • 16244391451 scopus 로고    scopus 로고
    • An analytic placer for mixed-size placement and timing-driven placement
    • A. B. Kahng and Q. Wang. An analytic placer for mixed-size placement and timing-driven placement. Proc. of ICCAD, pages 565-572, 2004.
    • (2004) Proc. of ICCAD , pp. 565-572
    • Kahng, A.B.1    Wang, Q.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.