Structural search for RTL with predicate learning

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 451-456

  Parthasarathy, G ^a   Iyer, M K ^a   Cheng, K T ^a   Brewer, F ^a  

^a Santa Barbara   (United States)

Author keywords

Interval Arithmetic; Learning; Predicate Abstraction; Satisfiability

Indexed keywords

ALGORITHMS; AUTOMATIC TESTING; BENCHMARKING; BOOLEAN ALGEBRA; CONSTRAINT THEORY; DIGITAL ARITHMETIC; FORMAL LOGIC; LEARNING SYSTEMS; NETWORKS (CIRCUITS);

AUTOMATIC TEST-PATTERN GENERATION (ATPG); INTERVAL ARITHMETIC; LEARNING; PREDICATE ABSTRACTION; REGISTER-TRANSFER-LEVEL (RTL); SATISFIABILITY;

SEARCH ENGINES;

EID: 27944450082     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193851     Document Type: Conference Paper

References (17)

1. st edition, 1990.
2. th VLSI Design Conf., pages 741-746, Jan. 2001.
3. G. Dantzig and B. Eaves. Fourier-Motzkin Elimination and its Dual. Journal of Combinatorial Theory, A(14):288-297, 1973.
4. M. Davis, G. Logemann, and D. Loveland. A Machine Program for Theorem Proving. Comm. of the ACM, 5(7):394-297, 1962.
5. J.-C. Filliâtre, S. Owre, H. Rueß, and N. Shankar. ICS: Integrated Canonization and Solving. Computer-Aided Verification, CAV '2001, pages 246-249, 2001.
6. I. Ghosh and M. Fujita. Automatic Test Pattern Generation for Functional Register-Transfer Level Circuits using Assignment Decision Diagrams. IEEE Transactions on CAD., 20(3):402-415, march 2001.
7. S. Graf and H. Saidi. Construction of Abstract State Graphs with PVS, Computer-Aided Verification, CAV '97, pages 72-83, 1997.
8. T. Hickey, Q. Ju, and M. H. V. Emden. Interval Arithmetic: Principles to Implementation Journal of the ACM, 48(5):1038-1068, 2001.
9. M. K. Iyer, G. Parthasarathy, and K.-T. Cheng. Efficient Conflict Based Learning in a Constraint Solver for RTL Circuits, in Proceedings of DATE'2004), pages 666-671, Mar 2005.
10. W. Kunz and D. Pradhan. Recursive Learning: A New Implication Technique for Efficient Solutions to CAD Problems. IEEE Trans. on CAD, 13:1143-1158, Sept. 1994.
11. J.P Marques-Silva and K.A. Sakallah. GRASP - A Search Algorithm for Propositional Satisfiability. IEEE Trans. on Computers, 48(5):506-521, 1999.
12. G. Parthasarathy, M.K. Iyer, K.-T. Cheng, and Li.C. Wang. An Efficient Finite-domain Constraint Solver for RTL Circuits. In 41st DAC, June 2004.
13. W. Kelly, et al., The Omega Calculator and Library v1.1.0. Technical report, Dept. of CS, UMCP, November 1996.
14. R.E. Moore. Interval Analysis. Prentice-Hall, NJ, 1966.
15. S. Seshia, S. Lahiri, and R. Bryant. A Hybrid SAT-based Decision Procedure for Separation Logic with Uninterpreted Functions. In 40th DAC, pages 425-430, June 2003.
16. A. Stump, C. W. Barrett, and D. L. Dill. CVC: a Cooperating Validity Checker. In Computer-Aided Verification, CAV'2002, pages 500-504, July 2002.
17. th VLSI Test Symp., pages 288-293, April 1997.