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Volumn 52, Issue 11, 2005, Pages 2447-2454

Further insight into the physics and modeling of floating-body capacitorless DRAMs

Author keywords

Bipolar transistors; DRAM; Floating body effect; Modeling; MOS devices

Indexed keywords

BIPOLAR TRANSISTORS; CAPACITORS; CMOS INTEGRATED CIRCUITS; EQUIVALENT CIRCUITS; IMPACT IONIZATION; MOS DEVICES; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR JUNCTIONS;

EID: 27744607423     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.857933     Document Type: Article
Times cited : (3)

References (10)
  • 1
    • 0025433827 scopus 로고
    • "The multistable charge-controlled memory effect in SOI MOS transistors at low temperatures"
    • May
    • M. R. Tack, M. Gao, C. L. Claeys, and G. J. Declerck, "The multistable charge-controlled memory effect in SOI MOS transistors at low temperatures," IEEE Trans. Electron Devices, vol. 37, no. 5, pp. 1373-1382, May 1990.
    • (1990) IEEE Trans. Electron Devices , vol.37 , Issue.5 , pp. 1373-1382
    • Tack, M.R.1    Gao, M.2    Claeys, C.L.3    Declerck, G.J.4
  • 4
    • 27744599989 scopus 로고    scopus 로고
    • "FBC (Floating Body Cell) for embedded DRAM on SOI"
    • K. Inoh et al., "FBC (Floating Body Cell) for embedded DRAM on SOI," in VLSI Symp. Tech. Dig..
    • VLSI Symp. Tech. Dig.
    • Inoh, K.1
  • 5
    • 27744581845 scopus 로고    scopus 로고
    • "Triple-well nMOSFET evaluated as a capacitor-less DRAM cell for nanoscale, low-cost & high density applications"
    • A. Villaret et al., "Triple-well nMOSFET evaluated as a capacitor-less DRAM cell for nanoscale, low-cost & high density applications," in Proc. VLSI Nanoworkshop, 2003.
    • (2003) Proc. VLSI Nanoworkshop
    • Villaret, A.1
  • 6
    • 4544324633 scopus 로고    scopus 로고
    • "A one transistor cell on bulk substrate (1T-Bulk) for low-cost and high density eDRAM"
    • R. Ranica and A. Villaret et al., "A one transistor cell on bulk substrate (1T-Bulk) for low-cost and high density eDRAM," in VLSI Symp. Tech. Dig., 2004.
    • (2004) VLSI Symp. Tech. Dig.
    • Ranica, R.1    Villaret, A.2
  • 7
    • 33745149710 scopus 로고    scopus 로고
    • "Scaled 1T-bulk devices built with CMOS 90nm technology for low-cost eDRAM applications"
    • to be published
    • R. Ranica and A. Villaret et al., "Scaled 1T-bulk devices built with CMOS 90nm technology for low-cost eDRAM applications," in VLSI Symp. Tech. Dig., 2005, to be published.
    • (2005) VLSI Symp. Tech. Dig.
    • Ranica, R.1    Villaret, A.2
  • 8
    • 1642603043 scopus 로고    scopus 로고
    • "Mechanisms of charge modulation in the floating-body of triple-well nMOSFET capacitor-less DRAMs"
    • Apr.
    • A. Villaret et al., "Mechanisms of charge modulation in the floating-body of triple-well nMOSFET capacitor-less DRAMs," Micro Electron. Eng., Apr. 2004.
    • (2004) Micro Electron. Eng.
    • Villaret, A.1
  • 9
    • 27744549744 scopus 로고
    • "Etude du comportement physique et électrique de dispositifs 0.2 μm en technologie silicium sur isolant"
    • Ph.D. thesis, Institut National Polytechnique de Grenoble, Gernoble, France, Mar.
    • P. Flatresse, "Etude du comportement physique et électrique de dispositifs 0.2 μm en technologie silicium sur isolant," Ph.D. thesis, Institut National Polytechnique de Grenoble, Gernoble, France, Mar. 1992.
    • (1992)
    • Flatresse, P.1
  • 10
    • 0026953126 scopus 로고
    • "A model for the field and temperature dependence of Shockley-Read-Hall lifetimes in silicon"
    • A. Shenk, "A model for the field and temperature dependence of Shockley-Read-Hall lifetimes in silicon," Solid-State Electron., vol. 35, no. 11, pp. 1585-1596, 1992.
    • (1992) Solid-State Electron. , vol.35 , Issue.11 , pp. 1585-1596
    • Shenk, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.